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[mesa3d] Sync all patch files with DDK 1.17.

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This commit is contained in:
Windsome Zeng
2022-08-16 17:38:05 +08:00
parent 6bfcc5fdc6
commit fe38db9384
70 changed files with 5794 additions and 6452 deletions
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package/mesa3d/0030-dri-add-support-for-YUV-DRI-config.patch
+104 -104
View File
@@ -1,7 +1,7 @@
From d4632fc9ce17416cd1f3019af554a320e142dc3b Mon Sep 17 00:00:00 2001
From 389e1a41360160bf56182a87cc52b5df9dc1265d Mon Sep 17 00:00:00 2001
From: Frank Binns <frank.binns@imgtec.com>
Date: Fri, 22 Dec 2017 17:17:50 +0000
Subject: [PATCH 31/50] dri: add support for YUV DRI config
Subject: [PATCH 30/67] dri: add support for YUV DRI config
This is prerequisite for adding support for EGL_EXT_yuv_surface.
@@ -9,11 +9,11 @@ This also adds support for NV12 and NV21 EGL configs.
---
include/GL/internal/dri_interface.h | 42 ++++++++-
src/gallium/frontends/dri/dri_screen.c | 8 +-
src/gallium/include/pipe/p_format.h | 3 +
src/mesa/drivers/dri/common/utils.c | 87 +++++++++++++++++--
src/gallium/include/pipe/p_format.h | 2 +
src/mesa/drivers/dri/common/utils.c | 88 +++++++++++++++++--
src/mesa/drivers/dri/common/utils.h | 3 +-
src/mesa/drivers/dri/i915/intel_screen.c | 8 +-
src/mesa/drivers/dri/i965/intel_screen.c | 12 ++-
src/mesa/drivers/dri/i965/brw_screen.c | 12 ++-
src/mesa/drivers/dri/nouveau/nouveau_screen.c | 4 +-
src/mesa/drivers/dri/radeon/radeon_screen.c | 4 +-
src/mesa/main/format_info.py | 2 +-
@@ -24,7 +24,7 @@ This also adds support for NV12 and NV21 EGL configs.
14 files changed, 181 insertions(+), 19 deletions(-)
diff --git a/include/GL/internal/dri_interface.h b/include/GL/internal/dri_interface.h
index cf1cb574c41..cff3d9019dd 100644
index 16cc095ea29..4d5a1874dc2 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -826,7 +826,13 @@ struct __DRIuseInvalidateExtensionRec {
@@ -91,52 +91,51 @@ index cf1cb574c41..cff3d9019dd 100644
* This extension defines the core DRI functionality.
*
diff --git a/src/gallium/frontends/dri/dri_screen.c b/src/gallium/frontends/dri/dri_screen.c
index 20ee86f52b7..09f13dd9b77 100644
index b565a1fe8ec..37a0d4add0c 100644
--- a/src/gallium/frontends/dri/dri_screen.c
+++ b/src/gallium/frontends/dri/dri_screen.c
@@ -306,7 +306,9 @@ dri_fill_in_modes(struct dri_screen *screen)
@@ -324,7 +324,9 @@ dri_fill_in_modes(struct dri_screen *screen)
depth_buffer_factor, back_buffer_modes,
ARRAY_SIZE(back_buffer_modes),
msaa_modes, 1,
- GL_TRUE, !mixed_color_depth, GL_FALSE);
+ GL_TRUE, !mixed_color_depth, GL_FALSE,
- GL_TRUE, !mixed_color_depth);
+ GL_TRUE, !mixed_color_depth,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
configs = driConcatConfigs(configs, new_configs);
/* Multi-sample configs without an accumulation buffer. */
@@ -316,7 +318,9 @@ dri_fill_in_modes(struct dri_screen *screen)
@@ -334,7 +336,9 @@ dri_fill_in_modes(struct dri_screen *screen)
depth_buffer_factor, back_buffer_modes,
ARRAY_SIZE(back_buffer_modes),
msaa_modes+1, num_msaa_modes-1,
- GL_FALSE, !mixed_color_depth, GL_FALSE);
+ GL_FALSE, !mixed_color_depth, GL_FALSE,
- GL_FALSE, !mixed_color_depth);
+ GL_FALSE, !mixed_color_depth,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
configs = driConcatConfigs(configs, new_configs);
}
}
diff --git a/src/gallium/include/pipe/p_format.h b/src/gallium/include/pipe/p_format.h
index 7c62b722e5d..a3a417ea0d8 100644
index 0c93d7df6e2..fd653379b7a 100644
--- a/src/gallium/include/pipe/p_format.h
+++ b/src/gallium/include/pipe/p_format.h
@@ -493,6 +493,9 @@ enum pipe_format {
PIPE_FORMAT_R8_G8B8_420_UNORM,
@@ -513,6 +513,8 @@ enum pipe_format {
PIPE_FORMAT_R4G4B4X4_UNORM,
PIPE_FORMAT_B10G10R10X2_SNORM,
PIPE_FORMAT_R5G6B5_SRGB,
+ PIPE_FORMAT_YUV420_2PLANE,
+ PIPE_FORMAT_YVU420_2PLANE,
+
PIPE_FORMAT_COUNT
};
diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c
index 0fdca2d9d84..85ffe2de64d 100644
index a3f2bc57f46..d268dc41fbb 100644
--- a/src/mesa/drivers/dri/common/utils.c
+++ b/src/mesa/drivers/dri/common/utils.c
@@ -166,6 +166,21 @@ driGetRendererString( char * buffer, const char * hardware_name,
* which translates to
* EGL_MUTABLE_RENDER_BUFFER_BIT_KHR.
@@ -163,6 +163,21 @@ driGetRendererString( char * buffer, const char * hardware_name,
* This forces 32-bit color to have 24-bit depth, and
* 16-bit color to have 16-bit depth.
*
+ * \param yuv_depth_range YUV pixel depth range. For non-YUV pixel formats this
+ * should be \c __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE.
@@ -156,17 +155,17 @@ index 0fdca2d9d84..85ffe2de64d 100644
* \returns
* Pointer to any array of pointers to the \c __DRIconfig structures created
* for the specified formats. If there is an error, \c NULL is returned.
@@ -179,7 +194,8 @@ driCreateConfigs(mesa_format format,
@@ -175,7 +190,8 @@ driCreateConfigs(mesa_format format,
unsigned num_depth_stencil_bits,
const GLenum * db_modes, unsigned num_db_modes,
const uint8_t * msaa_samples, unsigned num_msaa_modes,
GLboolean enable_accum, GLboolean color_depth_match,
- GLboolean mutable_render_buffer)
+ GLboolean mutable_render_buffer,
- GLboolean enable_accum, GLboolean color_depth_match)
+ GLboolean enable_accum, GLboolean color_depth_match,
+ GLint yuv_depth_range, GLint yuv_csc_standard)
{
static const struct {
uint32_t masks[4];
@@ -218,6 +234,9 @@ driCreateConfigs(mesa_format format,
@@ -214,6 +230,9 @@ driCreateConfigs(mesa_format format,
/* MESA_FORMAT_RGBA_FLOAT16 */
{{ 0, 0, 0, 0},
{ 0, 16, 32, 48 }},
@@ -176,7 +175,7 @@ index 0fdca2d9d84..85ffe2de64d 100644
};
const uint32_t * masks;
@@ -231,6 +250,11 @@ driCreateConfigs(mesa_format format,
@@ -227,6 +246,11 @@ driCreateConfigs(mesa_format format,
int green_bits;
int blue_bits;
int alpha_bits;
@@ -188,7 +187,7 @@ index 0fdca2d9d84..85ffe2de64d 100644
bool is_srgb;
bool is_float;
@@ -282,6 +306,33 @@ driCreateConfigs(mesa_format format,
@@ -279,6 +303,33 @@ driCreateConfigs(mesa_format format,
masks = format_table[8].masks;
shifts = format_table[8].shifts;
break;
@@ -222,7 +221,7 @@ index 0fdca2d9d84..85ffe2de64d 100644
default:
fprintf(stderr, "[%s:%u] Unknown framebuffer type %s (%d).\n",
__func__, __LINE__,
@@ -337,8 +388,12 @@ driCreateConfigs(mesa_format format,
@@ -334,8 +385,12 @@ driCreateConfigs(mesa_format format,
modes->greenShift = shifts[1];
modes->blueShift = shifts[2];
modes->alphaShift = shifts[3];
@@ -237,18 +236,19 @@ index 0fdca2d9d84..85ffe2de64d 100644
modes->accumRedBits = 16 * j;
modes->accumGreenBits = 16 * j;
@@ -355,6 +410,7 @@ driCreateConfigs(mesa_format format,
modes->transparentBlue = GLX_DONT_CARE;
modes->transparentAlpha = GLX_DONT_CARE;
modes->transparentIndex = GLX_DONT_CARE;
+ modes->rgbMode = !is_yuv;
@@ -345,6 +400,8 @@ driCreateConfigs(mesa_format format,
modes->stencilBits = stencil_bits[k];
modes->depthBits = depth_bits[k];
+ modes->rgbMode = !is_yuv;
+
if (db_modes[i] == __DRI_ATTRIB_SWAP_NONE) {
modes->doubleBufferMode = GL_FALSE;
@@ -379,6 +435,13 @@ driCreateConfigs(mesa_format format,
modes->yInverted = GL_TRUE;
modes->swapMethod = __DRI_ATTRIB_SWAP_UNDEFINED;
@@ -357,6 +414,13 @@ driCreateConfigs(mesa_format format,
modes->samples = msaa_samples[h];
modes->sRGBCapable = is_srgb;
modes->mutableRenderBuffer = mutable_render_buffer;
+
+ modes->YUVOrder = yuv_order;
+ modes->YUVNumberOfPlanes = yuv_num_planes;
@@ -259,22 +259,9 @@ index 0fdca2d9d84..85ffe2de64d 100644
}
}
}
@@ -468,6 +531,12 @@ static const struct { unsigned int attrib, offset; } attribMap[] = {
__ATTRIB(__DRI_ATTRIB_YINVERTED, yInverted),
__ATTRIB(__DRI_ATTRIB_FRAMEBUFFER_SRGB_CAPABLE, sRGBCapable),
__ATTRIB(__DRI_ATTRIB_MUTABLE_RENDER_BUFFER, mutableRenderBuffer),
+ __ATTRIB(__DRI_ATTRIB_YUV_ORDER, YUVOrder),
+ __ATTRIB(__DRI_ATTRIB_YUV_NUMBER_OF_PLANES, YUVNumberOfPlanes),
+ __ATTRIB(__DRI_ATTRIB_YUV_SUBSAMPLE, YUVSubsample),
+ __ATTRIB(__DRI_ATTRIB_YUV_DEPTH_RANGE, YUVDepthRange),
+ __ATTRIB(__DRI_ATTRIB_YUV_CSC_STANDARD, YUVCSCStandard),
+ __ATTRIB(__DRI_ATTRIB_YUV_PLANE_BPP, YUVPlaneBPP),
/* The struct field doesn't matter here, these are handled by the
* switch in driGetConfigAttribIndex. We need them in the array
@@ -487,10 +556,14 @@ driGetConfigAttribIndex(const __DRIconfig *config,
{
switch (attribMap[index].attrib) {
@@ -436,10 +500,14 @@ driGetConfigAttribIndex(const __DRIconfig *config,
break;
__ATTRIB(__DRI_ATTRIB_SAMPLES, samples);
case __DRI_ATTRIB_RENDER_TYPE:
- /* no support for color index mode */
- *value = __DRI_ATTRIB_RGBA_BIT;
@@ -290,116 +277,129 @@ index 0fdca2d9d84..85ffe2de64d 100644
+ *value |= __DRI_ATTRIB_FLOAT_BIT;
break;
case __DRI_ATTRIB_CONFIG_CAVEAT:
if (config->modes.visualRating == GLX_NON_CONFORMANT_CONFIG)
if (config->modes.accumRedBits != 0)
@@ -505,6 +573,12 @@ driGetConfigAttribIndex(const __DRIconfig *config,
__ATTRIB(__DRI_ATTRIB_GREEN_SHIFT, greenShift);
__ATTRIB(__DRI_ATTRIB_BLUE_SHIFT, blueShift);
__ATTRIB(__DRI_ATTRIB_ALPHA_SHIFT, alphaShift);
+ __ATTRIB(__DRI_ATTRIB_YUV_ORDER, YUVOrder);
+ __ATTRIB(__DRI_ATTRIB_YUV_NUMBER_OF_PLANES, YUVNumberOfPlanes);
+ __ATTRIB(__DRI_ATTRIB_YUV_SUBSAMPLE, YUVSubsample);
+ __ATTRIB(__DRI_ATTRIB_YUV_DEPTH_RANGE, YUVDepthRange);
+ __ATTRIB(__DRI_ATTRIB_YUV_CSC_STANDARD, YUVCSCStandard);
+ __ATTRIB(__DRI_ATTRIB_YUV_PLANE_BPP, YUVPlaneBPP);
default:
/* XXX log an error or smth */
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/common/utils.h b/src/mesa/drivers/dri/common/utils.h
index 7c9719f9f42..8159300c01d 100644
index 7be0465c261..ebd98d9dc33 100644
--- a/src/mesa/drivers/dri/common/utils.h
+++ b/src/mesa/drivers/dri/common/utils.h
@@ -46,7 +46,8 @@ driCreateConfigs(mesa_format format,
@@ -45,7 +45,8 @@ driCreateConfigs(mesa_format format,
unsigned num_depth_stencil_bits,
const GLenum * db_modes, unsigned num_db_modes,
const uint8_t * msaa_samples, unsigned num_msaa_modes,
GLboolean enable_accum, GLboolean color_depth_match,
- GLboolean mutable_render_buffer);
+ GLboolean mutable_render_buffer,
- GLboolean enable_accum, GLboolean color_depth_match);
+ GLboolean enable_accum, GLboolean color_depth_match,
+ GLint yuv_depth_range, GLint yuv_csc_standards);
__DRIconfig **driConcatConfigs(__DRIconfig **a,
__DRIconfig **b);
diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c
index 60b35d37a6e..62973d83bd5 100644
index 6135357c2a0..a94c6de0a06 100644
--- a/src/mesa/drivers/dri/i915/intel_screen.c
+++ b/src/mesa/drivers/dri/i915/intel_screen.c
@@ -1067,7 +1067,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
@@ -1083,7 +1083,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
num_depth_stencil_bits,
back_buffer_modes, 2,
singlesample_samples, 1,
- false, false, false);
+ false, false, false,
- false, false);
+ false, false,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
configs = driConcatConfigs(configs, new_configs);
}
@@ -1089,7 +1091,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
@@ -1105,7 +1107,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
depth_bits, stencil_bits, 1,
back_buffer_modes, 1,
singlesample_samples, 1,
- true, false, false);
+ true, false, false,
- true, false);
+ true, false,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
configs = driConcatConfigs(configs, new_configs);
}
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index 1e34cbbca1a..8fed9c6931a 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -2336,7 +2336,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
diff --git a/src/mesa/drivers/dri/i965/brw_screen.c b/src/mesa/drivers/dri/i965/brw_screen.c
index 56811110567..c450bae1054 100644
--- a/src/mesa/drivers/dri/i965/brw_screen.c
+++ b/src/mesa/drivers/dri/i965/brw_screen.c
@@ -2292,7 +2292,9 @@ brw_screen_make_configs(__DRIscreen *dri_screen)
num_depth_stencil_bits,
back_buffer_modes, 2,
singlesample_samples, 1,
false, false,
- /*mutable_render_buffer*/ true);
+ /*mutable_render_buffer*/ true,
- false, false);
+ false, false,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
configs = driConcatConfigs(configs, new_configs);
}
@@ -2369,7 +2371,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
@@ -2325,7 +2327,9 @@ brw_screen_make_configs(__DRIscreen *dri_screen)
depth_bits, stencil_bits, 1,
back_buffer_modes, 1,
singlesample_samples, 1,
- true, false, false);
+ true, false, false,
- true, false);
+ true, false,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
configs = driConcatConfigs(configs, new_configs);
}
@@ -2434,7 +2438,9 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
@@ -2390,7 +2394,9 @@ brw_screen_make_configs(__DRIscreen *dri_screen)
back_buffer_modes, 1,
multisample_samples,
num_msaa_modes,
- false, false, false);
+ false, false, false,
- false, false);
+ false, false,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
configs = driConcatConfigs(configs, new_configs);
}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
index ba85aacf741..9d4c1d9bd94 100644
index c92efcd7b20..fc87d5eb395 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_screen.c
@@ -79,7 +79,9 @@ nouveau_get_configs(uint32_t chipset)
ARRAY_SIZE(back_buffer_modes),
msaa_samples,
ARRAY_SIZE(msaa_samples),
- GL_TRUE, chipset < 0x10, GL_FALSE);
+ GL_TRUE, chipset < 0x10, GL_FALSE,
- GL_TRUE, chipset < 0x10);
+ GL_TRUE, chipset < 0x10,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
assert(config);
configs = driConcatConfigs(configs, config);
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index f61fe399c09..84aef8dd041 100644
index 3764a5d6538..f7628555b8f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -839,7 +839,9 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
@@ -838,7 +838,9 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
ARRAY_SIZE(back_buffer_modes),
msaa_samples_array,
ARRAY_SIZE(msaa_samples_array),
- GL_TRUE, GL_FALSE, GL_FALSE);
+ GL_TRUE, GL_FALSE, GL_FALSE,
- GL_TRUE, GL_FALSE);
+ GL_TRUE, GL_FALSE,
+ __DRI_ATTRIB_YUV_DEPTH_RANGE_NONE,
+ __DRI_ATTRIB_YUV_CSC_STANDARD_NONE);
configs = driConcatConfigs(configs, new_configs);
}
diff --git a/src/mesa/main/format_info.py b/src/mesa/main/format_info.py
index 42c236c7a6a..e07d2d98b89 100644
index edc0324e60b..d58403ea85e 100644
--- a/src/mesa/main/format_info.py
+++ b/src/mesa/main/format_info.py
@@ -29,7 +29,7 @@ import sys
@@ -412,10 +412,10 @@ index 42c236c7a6a..e07d2d98b89 100644
elif fmat.has_channel('r'):
if fmat.has_channel('g'):
diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
index ac00a21306b..de7b9feb14b 100644
index 9cd026f7507..f81caeceff4 100644
--- a/src/mesa/main/formats.c
+++ b/src/mesa/main/formats.c
@@ -1450,6 +1450,15 @@ _mesa_format_matches_format_and_type(mesa_format mformat,
@@ -1452,6 +1452,15 @@ _mesa_format_matches_format_and_type(mesa_format mformat,
if (error)
*error = GL_NO_ERROR;
@@ -432,7 +432,7 @@ index ac00a21306b..de7b9feb14b 100644
if (error)
*error = GL_INVALID_ENUM;
diff --git a/src/mesa/main/formats.csv b/src/mesa/main/formats.csv
index e2b54e935bb..166c3d4830d 100644
index 21cdea26e08..b2d476577e0 100644
--- a/src/mesa/main/formats.csv
+++ b/src/mesa/main/formats.csv
@@ -92,6 +92,8 @@ MESA_FORMAT_A2R10G10B10_UNORM , packed, 1, 1, 1, un2 , un10, un10, u
@@ -442,13 +442,13 @@ index e2b54e935bb..166c3d4830d 100644
+MESA_FORMAT_YUV420_2PLANE , other , 1, 1, 1, x8 , , , , y___, yuv
+MESA_FORMAT_YVU420_2PLANE , other , 1, 1, 1, x8 , , , , y___, yuv
# Array normalized formats
MESA_FORMAT_A_UNORM8 , array , 1, 1, 1, un8 , , , , 000x, rgb
MESA_FORMAT_RG_RB_UNORM8 , other , 2, 1, 1, x16 , , , , xyz1, rgb
MESA_FORMAT_GR_BR_UNORM8 , other , 2, 1, 1, x16 , , , , xyz1, rgb
diff --git a/src/mesa/main/formats.h b/src/mesa/main/formats.h
index 29c1308c383..4fcb5f73225 100644
index 508c9c342d2..0e778d64467 100644
--- a/src/mesa/main/formats.h
+++ b/src/mesa/main/formats.h
@@ -615,6 +615,13 @@ typedef enum pipe_format mesa_format;
@@ -617,6 +617,13 @@ typedef enum pipe_format mesa_format;
#define MESA_FORMAT_ATC_RGB PIPE_FORMAT_ATC_RGB
#define MESA_FORMAT_ATC_RGBA_EXPLICIT PIPE_FORMAT_ATC_RGBA_EXPLICIT
#define MESA_FORMAT_ATC_RGBA_INTERPOLATED PIPE_FORMAT_ATC_RGBA_INTERPOLATED
@@ -463,10 +463,10 @@ index 29c1308c383..4fcb5f73225 100644
/* Packed to array format adapters */
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 70e7b218197..96e55fc987d 100644
index 32528a5f16b..8f77d4c58dd 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -162,6 +162,7 @@ _mesa_varying_slot_in_fs(gl_varying_slot slot)
@@ -158,6 +158,7 @@ _mesa_varying_slot_in_fs(gl_varying_slot slot)
*/
struct gl_config
{
@@ -474,10 +474,10 @@ index 70e7b218197..96e55fc987d 100644
GLboolean floatMode;
GLuint doubleBufferMode;
GLuint stereoMode;
@@ -214,6 +215,14 @@ struct gl_config
@@ -179,6 +180,14 @@ struct gl_config
/* EGL_KHR_mutable_render_buffer */
GLuint mutableRenderBuffer; /* bool */
/* EXT_framebuffer_sRGB */
GLint sRGBCapable;
+
+ /* EXT_yuv_surface */
+ GLint YUVOrder;
@@ -490,5 +490,5 @@ index 70e7b218197..96e55fc987d 100644
--
2.17.1
2.25.1