francesco/fml13v01-buildroot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

initial buildroot for linux 5.15

Browse Source
This commit is contained in:
Huan.Feng
2021-12-06 14:12:13 +08:00
parent d7767d594e
commit 7b6fc358fa
12736 changed files with 508822 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
package/gcc/10.3.0/0001-Revert-re-PR-target-92095-internal-error-with-O1-mcp.patch
+328
View File
@@ -0,0 +1,328 @@
From 0824d6819857f306583592bce96315893f91bd84 Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Wed, 20 Jan 2021 23:26:29 +0100
Subject: [PATCH] Revert "re PR target/92095 (internal error with -O1
-mcpu=niagara2 -fPIE)"
This reverts commit 0a83f1a441d7aaadecb368c237b6ee70bd7b91d6.
Building the Buildroot defconfig qemu_sparc_ss10_defconfig using
gcc 8.4, 9.3 and 10 produce a broken rootfs that trigger illegal
instruction messages.
gcc 8.3, 9.2 are the latest working gcc version.
git bisect between gcc 8.4 and 8.4 allowed to identify
the commit that introcuce the regression.
Reverting this patch allowed to produce a working rootfs.
Reported to gcc:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
Signed-off-by: Romain Naour <romain.naour@gmail.com>
Cc: Eric Botcazou <ebotcazou@gcc.gnu.org>
---
gcc/config/sparc/sparc-protos.h | 1 -
gcc/config/sparc/sparc.c | 121 +++++++-----------
gcc/config/sparc/sparc.md | 5 +-
.../gcc.c-torture/compile/20191108-1.c | 14 --
gcc/testsuite/gcc.target/sparc/overflow-3.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-4.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-5.c | 2 +-
7 files changed, 53 insertions(+), 94 deletions(-)
delete mode 100644 gcc/testsuite/gcc.c-torture/compile/20191108-1.c
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index 5f9999a669c..37452b06415 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -69,7 +69,6 @@ extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
extern int sparc_split_reg_reg_legitimate (rtx, rtx);
extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
-extern const char *output_load_pcrel_sym (rtx *);
extern const char *output_ubranch (rtx, rtx_insn *);
extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
extern const char *output_return (rtx_insn *);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index d0843102148..14d112d8ca8 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -4157,6 +4157,13 @@ eligible_for_sibcall_delay (rtx_insn *trial)
static bool
sparc_cannot_force_const_mem (machine_mode mode, rtx x)
{
+ /* After IRA has run in PIC mode, it is too late to put anything into the
+ constant pool if the PIC register hasn't already been initialized. */
+ if ((lra_in_progress || reload_in_progress)
+ && flag_pic
+ && !crtl->uses_pic_offset_table)
+ return true;
+
switch (GET_CODE (x))
{
case CONST_INT:
@@ -4192,11 +4199,9 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
}
/* Global Offset Table support. */
-static GTY(()) rtx got_symbol_rtx = NULL_RTX;
-static GTY(()) rtx got_register_rtx = NULL_RTX;
static GTY(()) rtx got_helper_rtx = NULL_RTX;
-
-static GTY(()) bool got_helper_needed = false;
+static GTY(()) rtx got_register_rtx = NULL_RTX;
+static GTY(()) rtx got_symbol_rtx = NULL_RTX;
/* Return the SYMBOL_REF for the Global Offset Table. */
@@ -4209,6 +4214,27 @@ sparc_got (void)
return got_symbol_rtx;
}
+#ifdef HAVE_GAS_HIDDEN
+# define USE_HIDDEN_LINKONCE 1
+#else
+# define USE_HIDDEN_LINKONCE 0
+#endif
+
+static void
+get_pc_thunk_name (char name[32], unsigned int regno)
+{
+ const char *reg_name = reg_names[regno];
+
+ /* Skip the leading '%' as that cannot be used in a
+ symbol name. */
+ reg_name += 1;
+
+ if (USE_HIDDEN_LINKONCE)
+ sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
+ else
+ ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
+}
+
/* Wrapper around the load_pcrel_sym{si,di} patterns. */
static rtx
@@ -4228,78 +4254,30 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
return insn;
}
-/* Output the load_pcrel_sym{si,di} patterns. */
-
-const char *
-output_load_pcrel_sym (rtx *operands)
-{
- if (flag_delayed_branch)
- {
- output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
- output_asm_insn ("call\t%a2", operands);
- output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
- }
- else
- {
- output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
- output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
- output_asm_insn ("call\t%a2", operands);
- output_asm_insn (" nop", NULL);
- }
-
- if (operands[2] == got_helper_rtx)
- got_helper_needed = true;
-
- return "";
-}
-
-#ifdef HAVE_GAS_HIDDEN
-# define USE_HIDDEN_LINKONCE 1
-#else
-# define USE_HIDDEN_LINKONCE 0
-#endif
-
/* Emit code to load the GOT register. */
void
load_got_register (void)
{
- rtx insn;
+ if (!got_register_rtx)
+ got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
if (TARGET_VXWORKS_RTP)
- {
- if (!got_register_rtx)
- got_register_rtx = pic_offset_table_rtx;
-
- insn = gen_vxworks_load_got ();
- }
+ emit_insn (gen_vxworks_load_got ());
else
{
- if (!got_register_rtx)
- got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
-
/* The GOT symbol is subject to a PC-relative relocation so we need a
helper function to add the PC value and thus get the final value. */
if (!got_helper_rtx)
{
char name[32];
-
- /* Skip the leading '%' as that cannot be used in a symbol name. */
- if (USE_HIDDEN_LINKONCE)
- sprintf (name, "__sparc_get_pc_thunk.%s",
- reg_names[REGNO (got_register_rtx)] + 1);
- else
- ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
- REGNO (got_register_rtx));
-
+ get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
}
- insn
- = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
+ emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
+ got_helper_rtx));
}
-
- emit_insn (insn);
}
/* Ensure that we are not using patterns that are not OK with PIC. */
@@ -5464,7 +5442,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
return true;
/* GOT register (%l7) if needed. */
- if (got_register_rtx && regno == REGNO (got_register_rtx))
+ if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
return true;
/* If the function accesses prior frames, the frame pointer and the return
@@ -12507,9 +12485,10 @@ static void
sparc_file_end (void)
{
/* If we need to emit the special GOT helper function, do so now. */
- if (got_helper_needed)
+ if (got_helper_rtx)
{
const char *name = XSTR (got_helper_rtx, 0);
+ const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
#ifdef DWARF2_UNWIND_INFO
bool do_cfi;
#endif
@@ -12546,22 +12525,17 @@ sparc_file_end (void)
#ifdef DWARF2_UNWIND_INFO
do_cfi = dwarf2out_do_cfi_asm ();
if (do_cfi)
- output_asm_insn (".cfi_startproc", NULL);
+ fprintf (asm_out_file, "\t.cfi_startproc\n");
#endif
if (flag_delayed_branch)
- {
- output_asm_insn ("jmp\t%%o7+8", NULL);
- output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
- }
+ fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
+ reg_name, reg_name);
else
- {
- output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
- output_asm_insn ("jmp\t%%o7+8", NULL);
- output_asm_insn (" nop", NULL);
- }
+ fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
+ reg_name, reg_name);
#ifdef DWARF2_UNWIND_INFO
if (do_cfi)
- output_asm_insn (".cfi_endproc", NULL);
+ fprintf (asm_out_file, "\t.cfi_endproc\n");
#endif
}
@@ -13056,10 +13030,7 @@ sparc_init_pic_reg (void)
edge entry_edge;
rtx_insn *seq;
- /* In PIC mode, we need to always initialize the PIC register if optimization
- is enabled, because we are called from IRA and LRA may later force things
- to the constant pool for optimization purposes. */
- if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
+ if (!crtl->uses_pic_offset_table)
return;
start_sequence ();
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 6e9ccb4ecfd..8fb0fa11aed 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -1601,7 +1601,10 @@
(clobber (reg:P O7_REG))]
"REGNO (operands[0]) == INTVAL (operands[3])"
{
- return output_load_pcrel_sym (operands);
+ if (flag_delayed_branch)
+ return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
+ else
+ return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
}
[(set (attr "type") (const_string "multi"))
(set (attr "length")
diff --git a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c b/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
deleted file mode 100644
index 7929751bb06..00000000000
--- a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/* PR target/92095 */
-/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
-
-typedef union {
- double a;
- int b[2];
-} c;
-
-double d(int e)
-{
- c f;
- (&f)->b[0] = 15728640;
- return e ? -(&f)->a : (&f)->a;
-}
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-3.c b/gcc/testsuite/gcc.target/sparc/overflow-3.c
index 52d6ab2b688..86dddfb09e6 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-3.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-3.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie" } */
+/* { dg-options "-O" } */
#include <stdbool.h>
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c
index c6121b958c3..019feee335c 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-4.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie -mno-vis3 -mno-vis4" } */
+/* { dg-options "-O -mno-vis3 -mno-vis4" } */
#include <stdbool.h>
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-5.c b/gcc/testsuite/gcc.target/sparc/overflow-5.c
index f00283f6e7b..67d4ac38095 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-5.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-5.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie -mvis3" } */
+/* { dg-options "-O -mvis3" } */
#include <stdbool.h>
#include <stdint.h>
--
2.30.2
package/gcc/10.3.0/0002-or1k-Add-mcmodel-option-to-handle-large-GOTs.patch
+200
View File
@@ -0,0 +1,200 @@
From 1dad3f95ffcd1871ca670a13a06fbedb1c3ce509 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Sun, 2 May 2021 06:11:44 +0900
Subject: [PATCH] or1k: Add mcmodel option to handle large GOTs
When building libgeos we get an error with:
linux-uclibc/9.3.0/crtbeginS.o: in function `__do_global_dtors_aux':
crtstuff.c:(.text+0x118): relocation truncated to fit: R_OR1K_GOT16 against symbol `__cxa_finalize' defined in .text section in
/home/shorne/work/openrisc/3eb9f9d0f6d8274b2d19753c006bd83f7d536e3c/output/host/or1k-buildroot-linux-uclibc/sysroot/lib/libc.so.
This is caused by GOT code having a limit of 64k. In OpenRISC this
looks to be the only relocation code pattern to be limited to 64k.
This patch allows specifying a new option -mcmodel=large which can be
used to generate 2 more instructions to construct 32-bit addresses for
up to 4G GOTs.
gcc/ChangeLog:
PR 99783
* config/or1k/or1k-opts.h: New file.
* config/or1k/or1k.c (or1k_legitimize_address_1, print_reloc):
Support generating gotha relocations if -mcmodel=large is
specified.
* config/or1k/or1k.h (TARGET_CMODEL_SMALL, TARGET_CMODEL_LARGE):
New macros.
* config/or1k/or1k.opt (mcmodel=): New option.
* doc/invoke.text (OpenRISC Options): Document mcmodel.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
gcc/config/or1k/or1k-opts.h | 30 ++++++++++++++++++++++++++++++
gcc/config/or1k/or1k.c | 11 +++++++++--
gcc/config/or1k/or1k.h | 7 +++++++
gcc/config/or1k/or1k.opt | 19 +++++++++++++++++++
gcc/doc/invoke.texi | 12 +++++++++++-
5 files changed, 76 insertions(+), 3 deletions(-)
create mode 100644 gcc/config/or1k/or1k-opts.h
diff --git a/gcc/config/or1k/or1k-opts.h b/gcc/config/or1k/or1k-opts.h
new file mode 100644
index 00000000000..f791b894fdd
--- /dev/null
+++ b/gcc/config/or1k/or1k-opts.h
@@ -0,0 +1,30 @@
+/* Definitions for option handling for OpenRISC.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Stafford Horne.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_OR1K_OPTS_H
+#define GCC_OR1K_OPTS_H
+
+/* The OpenRISC code generation models available. */
+enum or1k_cmodel_type {
+ CMODEL_SMALL,
+ CMODEL_LARGE
+};
+
+#endif /* GCC_OR1K_OPTS_H */
diff --git a/gcc/config/or1k/or1k.c b/gcc/config/or1k/or1k.c
index 5fa5425aa2b..88613f9596b 100644
--- a/gcc/config/or1k/or1k.c
+++ b/gcc/config/or1k/or1k.c
@@ -750,7 +750,14 @@ or1k_legitimize_address_1 (rtx x, rtx scratch)
{
base = gen_sym_unspec (base, UNSPEC_GOT);
crtl->uses_pic_offset_table = 1;
- t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
+ if (TARGET_CMODEL_LARGE)
+ {
+ emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, base)));
+ emit_insn (gen_add3_insn (t1, t1, pic_offset_table_rtx));
+ t2 = gen_rtx_LO_SUM (Pmode, t1, base);
+ }
+ else
+ t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
t2 = gen_const_mem (Pmode, t2);
emit_insn (gen_rtx_SET (t1, t2));
base = t1;
@@ -1089,7 +1096,7 @@ print_reloc (FILE *stream, rtx x, HOST_WIDE_INT add, reloc_kind kind)
no special markup. */
static const char * const relocs[RKIND_MAX][RTYPE_MAX] = {
{ "lo", "got", "gotofflo", "tpofflo", "gottpofflo", "tlsgdlo" },
- { "ha", NULL, "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
+ { "ha", "gotha", "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
};
reloc_type type = RTYPE_DIRECT;
diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
index 23db771d8fb..f1646d16dfd 100644
--- a/gcc/config/or1k/or1k.h
+++ b/gcc/config/or1k/or1k.h
@@ -21,6 +21,8 @@
#ifndef GCC_OR1K_H
#define GCC_OR1K_H
+#include "config/or1k/or1k-opts.h"
+
/* Names to predefine in the preprocessor for this target machine. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
@@ -35,6 +37,11 @@
} \
while (0)
+#define TARGET_CMODEL_SMALL \
+ (or1k_code_model == CMODEL_SMALL)
+#define TARGET_CMODEL_LARGE \
+ (or1k_code_model == CMODEL_LARGE)
+
/* Storage layout. */
#define DEFAULT_SIGNED_CHAR 1
diff --git a/gcc/config/or1k/or1k.opt b/gcc/config/or1k/or1k.opt
index 03c9b8d0bba..8e035075f8a 100644
--- a/gcc/config/or1k/or1k.opt
+++ b/gcc/config/or1k/or1k.opt
@@ -21,6 +21,9 @@
; See the GCC internals manual (options.texi) for a description of
; this file's format.
+HeaderInclude
+config/or1k/or1k-opts.h
+
mhard-div
Target RejectNegative InverseMask(SOFT_DIV)
Enable generation of hardware divide (l.div, l.divu) instructions. This is the
@@ -63,6 +66,22 @@ When -mhard-float is selected, enables generation of unordered floating point
compare and set flag (lf.sfun*) instructions. By default functions from libgcc
are used to perform unordered floating point compare and set flag operations.
+mcmodel=
+Target RejectNegative Joined Enum(or1k_cmodel_type) Var(or1k_code_model) Init(CMODEL_SMALL)
+Specify the code model used for accessing memory addresses. Specifying large
+enables generating binaries with large global offset tables. By default the
+value is small.
+
+Enum
+Name(or1k_cmodel_type) Type(enum or1k_cmodel_type)
+Known code model types (for use with the -mcmodel= option):
+
+EnumValue
+Enum(or1k_cmodel_type) String(small) Value(CMODEL_SMALL)
+
+EnumValue
+Enum(or1k_cmodel_type) String(large) Value(CMODEL_LARGE)
+
mcmov
Target RejectNegative Mask(CMOV)
Enable generation of conditional move (l.cmov) instructions. By default the
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index eabeec944e7..eda350c99ec 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1102,7 +1102,8 @@ Objective-C and Objective-C++ Dialects}.
@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol
-msoft-mul -msoft-div @gol
-msoft-float -mhard-float -mdouble-float -munordered-float @gol
--mcmov -mror -mrori -msext -msfimm -mshftimm}
+-mcmov -mror -mrori -msext -msfimm -mshftimm @gol
+-mcmodel=@var{code-model}}
@emph{PDP-11 Options}
@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
@@ -25111,6 +25112,15 @@ Enable generation of shift with immediate (@code{l.srai}, @code{l.srli},
@code{l.slli}) instructions. By default extra instructions will be generated
to store the immediate to a register first.
+@item -mcmodel=small
+@opindex mcmodel=small
+Generate OpenRISC code for the small model: The GOT is limited to 64k. This is
+the default model.
+
+@item -mcmodel=large
+@opindex mcmodel=large
+Generate OpenRISC code for the large model: The GOT may grow up to 4G in size.
+
@end table
--
2.25.1
package/gcc/10.3.0/0003-or1k-Use-cmodel-large-when-building-crtstuff.patch
+60
View File
@@ -0,0 +1,60 @@
From 0354e007a6235df81e208fa89cbf1571a8b56975 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Sun, 2 May 2021 06:11:45 +0900
Subject: [PATCH] or1k: Use cmodel=large when building crtstuff
When linking gcc runtime objects into large binaries the link may fail
with the below errors. This will happen even if we are building with
-mcmodel=large.
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `deregister_tm_clones':
crtstuff.c:(.text+0x3c): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_deregisterTMCloneTable'
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `register_tm_clones':
crtstuff.c:(.text+0xc0): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_registerTMCloneTable'
This patch builds the gcc crtstuff binaries always with the
-mcmodel=large option to ensure they can be linked into large binaries.
libgcc/ChangeLog:
PR 99783
* config.host (or1k-*, tmake_file): Add or1k/t-crtstuff.
* config/or1k/t-crtstuff: New file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
libgcc/config.host | 4 ++--
libgcc/config/or1k/t-crtstuff | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
create mode 100644 libgcc/config/or1k/t-crtstuff
diff --git a/libgcc/config.host b/libgcc/config.host
index c529cc40f0c..ddf0033e28c 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1127,12 +1127,12 @@ nios2-*-*)
extra_parts="$extra_parts crti.o crtn.o"
;;
or1k-*-linux*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
md_unwind_header=or1k/linux-unwind.h
;;
or1k-*-*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
;;
pdp11-*-*)
diff --git a/libgcc/config/or1k/t-crtstuff b/libgcc/config/or1k/t-crtstuff
new file mode 100644
index 00000000000..dcae7f3498e
--- /dev/null
+++ b/libgcc/config/or1k/t-crtstuff
@@ -0,0 +1,2 @@
+# Compile crtbeginS.o and crtendS.o with -mcmodel=large
+CRTSTUFF_T_CFLAGS_S += -mcmodel=large
--
2.25.1
package/gcc/10.3.0/0004-Remove-cyclades-from-libsanitizer.patch
+125
View File
@@ -0,0 +1,125 @@
From 745dae5923aba02982563481d75a21595df22ff8 Mon Sep 17 00:00:00 2001
From: Tamar Christina <tamar.christina@arm.com>
Date: Fri, 21 May 2021 10:30:59 +0100
Subject: [PATCH] libsanitizer: Remove cyclades from libsanitizer
The Linux kernel has removed the interface to cyclades from
the latest kernel headers[1] due to them being orphaned for the
past 13 years.
libsanitizer uses this header when compiling against glibc, but
glibcs itself doesn't seem to have any references to cyclades.
Further more it seems that the driver is broken in the kernel and
the firmware doesn't seem to be available anymore.
As such since this is breaking the build of libsanitizer (and so the
GCC bootstrap[2]) I propose to remove this.
[1] https://lkml.org/lkml/2021/3/2/153
[2] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100379
(cherry picked from commit f7c5351552387bd43f6ca3631016d7f0dfe0f135)
libsanitizer/ChangeLog:
PR sanitizer/100379
* sanitizer_common/sanitizer_common_interceptors_ioctl.inc: Cherry-pick
llvm-project revision f7c5351552387bd43f6ca3631016d7f0dfe0f135.
* sanitizer_common/sanitizer_platform_limits_posix.cpp: Likewise.
* sanitizer_common/sanitizer_platform_limits_posix.h: Likewise.
Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
---
.../sanitizer_common_interceptors_ioctl.inc | 9 ---------
.../sanitizer_platform_limits_posix.cpp | 11 -----------
.../sanitizer_platform_limits_posix.h | 10 ----------
3 files changed, 30 deletions(-)
diff --git a/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc b/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
index 7f181258eab..b7da6598755 100644
--- a/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
+++ b/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
@@ -370,15 +370,6 @@ static void ioctl_table_fill() {
#if SANITIZER_GLIBC
// _(SIOCDEVPLIP, WRITE, struct_ifreq_sz); // the same as EQL_ENSLAVE
- _(CYGETDEFTHRESH, WRITE, sizeof(int));
- _(CYGETDEFTIMEOUT, WRITE, sizeof(int));
- _(CYGETMON, WRITE, struct_cyclades_monitor_sz);
- _(CYGETTHRESH, WRITE, sizeof(int));
- _(CYGETTIMEOUT, WRITE, sizeof(int));
- _(CYSETDEFTHRESH, NONE, 0);
- _(CYSETDEFTIMEOUT, NONE, 0);
- _(CYSETTHRESH, NONE, 0);
- _(CYSETTIMEOUT, NONE, 0);
_(EQL_EMANCIPATE, WRITE, struct_ifreq_sz);
_(EQL_ENSLAVE, WRITE, struct_ifreq_sz);
_(EQL_GETMASTRCFG, WRITE, struct_ifreq_sz);
diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
index 35a690cba5c..6e5c330b98e 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
@@ -143,7 +143,6 @@ typedef struct user_fpregs elf_fpregset_t;
# include <sys/procfs.h>
#endif
#include <sys/user.h>
-#include <linux/cyclades.h>
#include <linux/if_eql.h>
#include <linux/if_plip.h>
#include <linux/lp.h>
@@ -460,7 +459,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
#if SANITIZER_GLIBC
unsigned struct_ax25_parms_struct_sz = sizeof(struct ax25_parms_struct);
- unsigned struct_cyclades_monitor_sz = sizeof(struct cyclades_monitor);
#if EV_VERSION > (0x010000)
unsigned struct_input_keymap_entry_sz = sizeof(struct input_keymap_entry);
#else
@@ -824,15 +822,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
#endif // SANITIZER_LINUX
#if SANITIZER_LINUX && !SANITIZER_ANDROID
- unsigned IOCTL_CYGETDEFTHRESH = CYGETDEFTHRESH;
- unsigned IOCTL_CYGETDEFTIMEOUT = CYGETDEFTIMEOUT;
- unsigned IOCTL_CYGETMON = CYGETMON;
- unsigned IOCTL_CYGETTHRESH = CYGETTHRESH;
- unsigned IOCTL_CYGETTIMEOUT = CYGETTIMEOUT;
- unsigned IOCTL_CYSETDEFTHRESH = CYSETDEFTHRESH;
- unsigned IOCTL_CYSETDEFTIMEOUT = CYSETDEFTIMEOUT;
- unsigned IOCTL_CYSETTHRESH = CYSETTHRESH;
- unsigned IOCTL_CYSETTIMEOUT = CYSETTIMEOUT;
unsigned IOCTL_EQL_EMANCIPATE = EQL_EMANCIPATE;
unsigned IOCTL_EQL_ENSLAVE = EQL_ENSLAVE;
unsigned IOCTL_EQL_GETMASTRCFG = EQL_GETMASTRCFG;
diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
index ad358eef8b7..cba41ba5494 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -983,7 +983,6 @@ extern unsigned struct_vt_mode_sz;
#if SANITIZER_LINUX && !SANITIZER_ANDROID
extern unsigned struct_ax25_parms_struct_sz;
-extern unsigned struct_cyclades_monitor_sz;
extern unsigned struct_input_keymap_entry_sz;
extern unsigned struct_ipx_config_data_sz;
extern unsigned struct_kbdiacrs_sz;
@@ -1328,15 +1327,6 @@ extern unsigned IOCTL_VT_WAITACTIVE;
#endif // SANITIZER_LINUX
#if SANITIZER_LINUX && !SANITIZER_ANDROID
-extern unsigned IOCTL_CYGETDEFTHRESH;
-extern unsigned IOCTL_CYGETDEFTIMEOUT;
-extern unsigned IOCTL_CYGETMON;
-extern unsigned IOCTL_CYGETTHRESH;
-extern unsigned IOCTL_CYGETTIMEOUT;
-extern unsigned IOCTL_CYSETDEFTHRESH;
-extern unsigned IOCTL_CYSETDEFTIMEOUT;
-extern unsigned IOCTL_CYSETTHRESH;
-extern unsigned IOCTL_CYSETTIMEOUT;
extern unsigned IOCTL_EQL_EMANCIPATE;
extern unsigned IOCTL_EQL_ENSLAVE;
extern unsigned IOCTL_EQL_GETMASTRCFG;
--
2.27.0
package/gcc/11.2.0/0001-or1k-Add-mcmodel-option-to-handle-large-GOTs.patch
+200
View File
@@ -0,0 +1,200 @@
From eff8110674ef193481d3657456a262beeb9951ff Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Tue, 6 Apr 2021 05:47:17 +0900
Subject: [PATCH] or1k: Add mcmodel option to handle large GOTs
When building libgeos we get an error with:
linux-uclibc/9.3.0/crtbeginS.o: in function `__do_global_dtors_aux':
crtstuff.c:(.text+0x118): relocation truncated to fit: R_OR1K_GOT16 against symbol `__cxa_finalize' defined in .text section in
/home/shorne/work/openrisc/3eb9f9d0f6d8274b2d19753c006bd83f7d536e3c/output/host/or1k-buildroot-linux-uclibc/sysroot/lib/libc.so.
This is caused by GOT code having a limit of 64k. In OpenRISC this
looks to be the only relocation code pattern to be limited to 64k.
This patch allows specifying a new option -mcmodel=large which can be
used to generate 2 more instructions to construct 32-bit addresses for
up to 4G GOTs.
gcc/ChangeLog:
PR target/99783
* config/or1k/or1k-opts.h: New file.
* config/or1k/or1k.c (or1k_legitimize_address_1, print_reloc):
Support generating gotha relocations if -mcmodel=large is
specified.
* config/or1k/or1k.h (TARGET_CMODEL_SMALL, TARGET_CMODEL_LARGE):
New macros.
* config/or1k/or1k.opt (mcmodel=): New option.
* doc/invoke.texi (OpenRISC Options): Document mcmodel.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
gcc/config/or1k/or1k-opts.h | 30 ++++++++++++++++++++++++++++++
gcc/config/or1k/or1k.c | 11 +++++++++--
gcc/config/or1k/or1k.h | 7 +++++++
gcc/config/or1k/or1k.opt | 19 +++++++++++++++++++
gcc/doc/invoke.texi | 12 +++++++++++-
5 files changed, 76 insertions(+), 3 deletions(-)
create mode 100644 gcc/config/or1k/or1k-opts.h
diff --git a/gcc/config/or1k/or1k-opts.h b/gcc/config/or1k/or1k-opts.h
new file mode 100644
index 00000000000..f791b894fdd
--- /dev/null
+++ b/gcc/config/or1k/or1k-opts.h
@@ -0,0 +1,30 @@
+/* Definitions for option handling for OpenRISC.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Stafford Horne.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_OR1K_OPTS_H
+#define GCC_OR1K_OPTS_H
+
+/* The OpenRISC code generation models available. */
+enum or1k_cmodel_type {
+ CMODEL_SMALL,
+ CMODEL_LARGE
+};
+
+#endif /* GCC_OR1K_OPTS_H */
diff --git a/gcc/config/or1k/or1k.c b/gcc/config/or1k/or1k.c
index e772a7addea..27d3fa17995 100644
--- a/gcc/config/or1k/or1k.c
+++ b/gcc/config/or1k/or1k.c
@@ -750,7 +750,14 @@ or1k_legitimize_address_1 (rtx x, rtx scratch)
{
base = gen_sym_unspec (base, UNSPEC_GOT);
crtl->uses_pic_offset_table = 1;
- t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
+ if (TARGET_CMODEL_LARGE)
+ {
+ emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, base)));
+ emit_insn (gen_add3_insn (t1, t1, pic_offset_table_rtx));
+ t2 = gen_rtx_LO_SUM (Pmode, t1, base);
+ }
+ else
+ t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
t2 = gen_const_mem (Pmode, t2);
emit_insn (gen_rtx_SET (t1, t2));
base = t1;
@@ -1089,7 +1096,7 @@ print_reloc (FILE *stream, rtx x, HOST_WIDE_INT add, reloc_kind kind)
no special markup. */
static const char * const relocs[RKIND_MAX][RTYPE_MAX] = {
{ "lo", "got", "gotofflo", "tpofflo", "gottpofflo", "tlsgdlo" },
- { "ha", NULL, "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
+ { "ha", "gotha", "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
};
reloc_type type = RTYPE_DIRECT;
diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
index fe01ab81ead..669907e7e74 100644
--- a/gcc/config/or1k/or1k.h
+++ b/gcc/config/or1k/or1k.h
@@ -21,6 +21,8 @@
#ifndef GCC_OR1K_H
#define GCC_OR1K_H
+#include "config/or1k/or1k-opts.h"
+
/* Names to predefine in the preprocessor for this target machine. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
@@ -37,6 +39,11 @@
} \
while (0)
+#define TARGET_CMODEL_SMALL \
+ (or1k_code_model == CMODEL_SMALL)
+#define TARGET_CMODEL_LARGE \
+ (or1k_code_model == CMODEL_LARGE)
+
/* Storage layout. */
#define DEFAULT_SIGNED_CHAR 1
diff --git a/gcc/config/or1k/or1k.opt b/gcc/config/or1k/or1k.opt
index 6bd0f3eee6d..cc23e3b8856 100644
--- a/gcc/config/or1k/or1k.opt
+++ b/gcc/config/or1k/or1k.opt
@@ -21,6 +21,9 @@
; See the GCC internals manual (options.texi) for a description of
; this file's format.
+HeaderInclude
+config/or1k/or1k-opts.h
+
mhard-div
Target RejectNegative InverseMask(SOFT_DIV)
Enable generation of hardware divide (l.div, l.divu) instructions. This is the
@@ -63,6 +66,22 @@ When -mhard-float is selected, enables generation of unordered floating point
compare and set flag (lf.sfun*) instructions. By default functions from libgcc
are used to perform unordered floating point compare and set flag operations.
+mcmodel=
+Target RejectNegative Joined Enum(or1k_cmodel_type) Var(or1k_code_model) Init(CMODEL_SMALL)
+Specify the code model used for accessing memory addresses. Specifying large
+enables generating binaries with large global offset tables. By default the
+value is small.
+
+Enum
+Name(or1k_cmodel_type) Type(enum or1k_cmodel_type)
+Known code model types (for use with the -mcmodel= option):
+
+EnumValue
+Enum(or1k_cmodel_type) String(small) Value(CMODEL_SMALL)
+
+EnumValue
+Enum(or1k_cmodel_type) String(large) Value(CMODEL_LARGE)
+
mcmov
Target RejectNegative Mask(CMOV)
Enable generation of conditional move (l.cmov) instructions. By default the
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 57b97a0838c..d8a6b0b60c9 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1141,7 +1141,8 @@ Objective-C and Objective-C++ Dialects}.
@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol
-msoft-mul -msoft-div @gol
-msoft-float -mhard-float -mdouble-float -munordered-float @gol
--mcmov -mror -mrori -msext -msfimm -mshftimm}
+-mcmov -mror -mrori -msext -msfimm -mshftimm @gol
+-mcmodel=@var{code-model}}
@emph{PDP-11 Options}
@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
@@ -26684,6 +26685,15 @@ Enable generation of shift with immediate (@code{l.srai}, @code{l.srli},
@code{l.slli}) instructions. By default extra instructions will be generated
to store the immediate to a register first.
+@item -mcmodel=small
+@opindex mcmodel=small
+Generate OpenRISC code for the small model: The GOT is limited to 64k. This is
+the default model.
+
+@item -mcmodel=large
+@opindex mcmodel=large
+Generate OpenRISC code for the large model: The GOT may grow up to 4G in size.
+
@end table
--
2.25.1
package/gcc/11.2.0/0002-or1k-Use-cmodel-large-when-building-crtstuff.patch
+60
View File
@@ -0,0 +1,60 @@
From da8a9d695b3c4b9397b5d9a27660bfa48af8d707 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Wed, 21 Apr 2021 05:33:15 +0900
Subject: [PATCH] or1k: Use cmodel=large when building crtstuff
When linking gcc runtime objects into large binaries the link may fail
with the below errors. This will happen even if we are building with
-mcmodel=large.
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `deregister_tm_clones':
crtstuff.c:(.text+0x3c): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_deregisterTMCloneTable'
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `register_tm_clones':
crtstuff.c:(.text+0xc0): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_registerTMCloneTable'
This patch builds the gcc crtstuff binaries always with the
-mcmodel=large option to ensure they can be linked into large binaries.
libgcc/ChangeLog:
PR target/99783
* config.host (or1k-*, tmake_file): Add or1k/t-crtstuff.
* config/or1k/t-crtstuff: New file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
libgcc/config.host | 4 ++--
libgcc/config/or1k/t-crtstuff | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
create mode 100644 libgcc/config/or1k/t-crtstuff
diff --git a/libgcc/config.host b/libgcc/config.host
index 50f00062232..8ca7a00082a 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1119,12 +1119,12 @@ nios2-*-*)
extra_parts="$extra_parts crti.o crtn.o"
;;
or1k-*-linux*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
md_unwind_header=or1k/linux-unwind.h
;;
or1k-*-*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
;;
pdp11-*-*)
diff --git a/libgcc/config/or1k/t-crtstuff b/libgcc/config/or1k/t-crtstuff
new file mode 100644
index 00000000000..dcae7f3498e
--- /dev/null
+++ b/libgcc/config/or1k/t-crtstuff
@@ -0,0 +1,2 @@
+# Compile crtbeginS.o and crtendS.o with -mcmodel=large
+CRTSTUFF_T_CFLAGS_S += -mcmodel=large
--
2.25.1
package/gcc/8.4.0/0001-xtensa-fix-PR-target-91880.patch
+51
View File
@@ -0,0 +1,51 @@
From 28623c81b50663e946790649352cb1b3ed23954d Mon Sep 17 00:00:00 2001
From: Max Filippov <jcmvbkbc@gmail.com>
Date: Tue, 24 Sep 2019 04:15:17 -0700
Subject: [PATCH] xtensa: fix PR target/91880
Xtensa hwloop_optimize segfaults when zero overhead loop is about to be
inserted as the first instruction of the function.
Insert zero overhead loop instruction into new basic block before the
loop when basic block that precedes the loop is empty.
2019-09-26 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.c (hwloop_optimize): Insert zero overhead
loop instruction into new basic block before the loop when basic
block that precedes the loop is empty.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
[Romain: rebase on gcc 8.4.0]
Signed-off-by: Romain Naour <romain.naour@smile.fr>
---
Backported from: r276166
gcc/config/xtensa/xtensa.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 08f9f7c7a8f..de206527810 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -4232,7 +4232,9 @@ hwloop_optimize (hwloop_info loop)
seq = get_insns ();
- if (!single_succ_p (entry_bb) || vec_safe_length (loop->incoming) > 1)
+ entry_after = BB_END (entry_bb);
+ if (!single_succ_p (entry_bb) || vec_safe_length (loop->incoming) > 1
+ || !entry_after)
{
basic_block new_bb;
edge e;
@@ -4253,7 +4255,6 @@ hwloop_optimize (hwloop_info loop)
}
else
{
- entry_after = BB_END (entry_bb);
while (DEBUG_INSN_P (entry_after)
|| (NOTE_P (entry_after)
&& NOTE_KIND (entry_after) != NOTE_INSN_BASIC_BLOCK))
--
2.24.1
package/gcc/8.4.0/0002-Revert-re-PR-target-92095-internal-error-with-O1-mcp.patch
+322
View File
@@ -0,0 +1,322 @@
From bb9b71752267444b4360442b89129bfc0ae938d3 Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Wed, 20 Jan 2021 23:06:07 +0100
Subject: [PATCH] Revert "re PR target/92095 (internal error with -O1
-mcpu=niagara2 -fPIE)"
This reverts commit 3fcce773f0f914c0499b130c6e9efa0e45ee54a0.
Building the Buildroot defconfig qemu_sparc_ss10_defconfig using
gcc 8.4, 9.3 and 10 produce a broken rootfs that trigger illegal
instruction messages.
gcc 8.3, 9.2 are the latest working gcc version.
git bisect between gcc 8.4 and 8.4 allowed to identify
the commit that introcuce the regression.
Reverting this patch allowed to produce a working rootfs.
Signed-off-by: Romain Naour <romain.naour@gmail.com>
Cc: Eric Botcazou <ebotcazou@gcc.gnu.org>
---
gcc/config/sparc/sparc-protos.h | 1 -
gcc/config/sparc/sparc.c | 121 +++++++-----------
gcc/config/sparc/sparc.md | 5 +-
.../gcc.c-torture/compile/20191108-1.c | 14 --
gcc/testsuite/gcc.target/sparc/overflow-3.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-4.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-5.c | 2 +-
7 files changed, 53 insertions(+), 94 deletions(-)
delete mode 100644 gcc/testsuite/gcc.c-torture/compile/20191108-1.c
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index b3f73c2f2bf..71a067e871c 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -69,7 +69,6 @@ extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
extern int sparc_split_reg_reg_legitimate (rtx, rtx);
extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
-extern const char *output_load_pcrel_sym (rtx *);
extern const char *output_ubranch (rtx, rtx_insn *);
extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
extern const char *output_return (rtx_insn *);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 73032d33596..db1b428db90 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -4200,6 +4200,13 @@ eligible_for_sibcall_delay (rtx_insn *trial)
static bool
sparc_cannot_force_const_mem (machine_mode mode, rtx x)
{
+ /* After IRA has run in PIC mode, it is too late to put anything into the
+ constant pool if the PIC register hasn't already been initialized. */
+ if ((lra_in_progress || reload_in_progress)
+ && flag_pic
+ && !crtl->uses_pic_offset_table)
+ return true;
+
switch (GET_CODE (x))
{
case CONST_INT:
@@ -4235,11 +4242,9 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
}
/* Global Offset Table support. */
-static GTY(()) rtx got_symbol_rtx = NULL_RTX;
-static GTY(()) rtx got_register_rtx = NULL_RTX;
static GTY(()) rtx got_helper_rtx = NULL_RTX;
-
-static GTY(()) bool got_helper_needed = false;
+static GTY(()) rtx got_register_rtx = NULL_RTX;
+static GTY(()) rtx got_symbol_rtx = NULL_RTX;
/* Return the SYMBOL_REF for the Global Offset Table. */
@@ -4252,6 +4257,27 @@ sparc_got (void)
return got_symbol_rtx;
}
+#ifdef HAVE_GAS_HIDDEN
+# define USE_HIDDEN_LINKONCE 1
+#else
+# define USE_HIDDEN_LINKONCE 0
+#endif
+
+static void
+get_pc_thunk_name (char name[32], unsigned int regno)
+{
+ const char *reg_name = reg_names[regno];
+
+ /* Skip the leading '%' as that cannot be used in a
+ symbol name. */
+ reg_name += 1;
+
+ if (USE_HIDDEN_LINKONCE)
+ sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
+ else
+ ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
+}
+
/* Wrapper around the load_pcrel_sym{si,di} patterns. */
static rtx
@@ -4271,78 +4297,30 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
return insn;
}
-/* Output the load_pcrel_sym{si,di} patterns. */
-
-const char *
-output_load_pcrel_sym (rtx *operands)
-{
- if (flag_delayed_branch)
- {
- output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
- output_asm_insn ("call\t%a2", operands);
- output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
- }
- else
- {
- output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
- output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
- output_asm_insn ("call\t%a2", operands);
- output_asm_insn (" nop", NULL);
- }
-
- if (operands[2] == got_helper_rtx)
- got_helper_needed = true;
-
- return "";
-}
-
-#ifdef HAVE_GAS_HIDDEN
-# define USE_HIDDEN_LINKONCE 1
-#else
-# define USE_HIDDEN_LINKONCE 0
-#endif
-
/* Emit code to load the GOT register. */
void
load_got_register (void)
{
- rtx insn;
+ if (!got_register_rtx)
+ got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
if (TARGET_VXWORKS_RTP)
- {
- if (!got_register_rtx)
- got_register_rtx = pic_offset_table_rtx;
-
- insn = gen_vxworks_load_got ();
- }
+ emit_insn (gen_vxworks_load_got ());
else
{
- if (!got_register_rtx)
- got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
-
/* The GOT symbol is subject to a PC-relative relocation so we need a
helper function to add the PC value and thus get the final value. */
if (!got_helper_rtx)
{
char name[32];
-
- /* Skip the leading '%' as that cannot be used in a symbol name. */
- if (USE_HIDDEN_LINKONCE)
- sprintf (name, "__sparc_get_pc_thunk.%s",
- reg_names[REGNO (got_register_rtx)] + 1);
- else
- ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
- REGNO (got_register_rtx));
-
+ get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
}
- insn
- = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
+ emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
+ got_helper_rtx));
}
-
- emit_insn (insn);
}
/* Ensure that we are not using patterns that are not OK with PIC. */
@@ -5494,7 +5472,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
return true;
/* GOT register (%l7) if needed. */
- if (got_register_rtx && regno == REGNO (got_register_rtx))
+ if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
return true;
/* If the function accesses prior frames, the frame pointer and the return
@@ -12475,9 +12453,10 @@ static void
sparc_file_end (void)
{
/* If we need to emit the special GOT helper function, do so now. */
- if (got_helper_needed)
+ if (got_helper_rtx)
{
const char *name = XSTR (got_helper_rtx, 0);
+ const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
#ifdef DWARF2_UNWIND_INFO
bool do_cfi;
#endif
@@ -12514,22 +12493,17 @@ sparc_file_end (void)
#ifdef DWARF2_UNWIND_INFO
do_cfi = dwarf2out_do_cfi_asm ();
if (do_cfi)
- output_asm_insn (".cfi_startproc", NULL);
+ fprintf (asm_out_file, "\t.cfi_startproc\n");
#endif
if (flag_delayed_branch)
- {
- output_asm_insn ("jmp\t%%o7+8", NULL);
- output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
- }
+ fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
+ reg_name, reg_name);
else
- {
- output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
- output_asm_insn ("jmp\t%%o7+8", NULL);
- output_asm_insn (" nop", NULL);
- }
+ fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
+ reg_name, reg_name);
#ifdef DWARF2_UNWIND_INFO
if (do_cfi)
- output_asm_insn (".cfi_endproc", NULL);
+ fprintf (asm_out_file, "\t.cfi_endproc\n");
#endif
}
@@ -13035,10 +13009,7 @@ sparc_init_pic_reg (void)
edge entry_edge;
rtx_insn *seq;
- /* In PIC mode, we need to always initialize the PIC register if optimization
- is enabled, because we are called from IRA and LRA may later force things
- to the constant pool for optimization purposes. */
- if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
+ if (!crtl->uses_pic_offset_table)
return;
start_sequence ();
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 468e2cc5d3b..25134bd1148 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -1601,7 +1601,10 @@
(clobber (reg:P O7_REG))]
"REGNO (operands[0]) == INTVAL (operands[3])"
{
- return output_load_pcrel_sym (operands);
+ if (flag_delayed_branch)
+ return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
+ else
+ return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
}
[(set (attr "type") (const_string "multi"))
(set (attr "length")
diff --git a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c b/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
deleted file mode 100644
index 7929751bb06..00000000000
--- a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/* PR target/92095 */
-/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
-
-typedef union {
- double a;
- int b[2];
-} c;
-
-double d(int e)
-{
- c f;
- (&f)->b[0] = 15728640;
- return e ? -(&f)->a : (&f)->a;
-}
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-3.c b/gcc/testsuite/gcc.target/sparc/overflow-3.c
index 18253bb6e5e..8cb24f52f7b 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-3.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O -fno-pie" } */
+/* { dg-options "-O" } */
/* { dg-require-effective-target lp64 } */
#include <stdbool.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c
index fb30877efb9..868edea2b9e 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-4.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O -fno-pie -mno-vis3" } */
+/* { dg-options "-O -mno-vis3" } */
/* { dg-require-effective-target lp64 } */
#include <stdbool.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-5.c b/gcc/testsuite/gcc.target/sparc/overflow-5.c
index 509d957715d..501ce04f7a1 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-5.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-5.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O -fno-pie -mvis3" } */
+/* { dg-options "-O -mvis3" } */
/* { dg-require-effective-target lp64 } */
#include <stdbool.h>
--
2.25.4
package/gcc/8.4.0/0003-libsanitizer-Remove-cyclades-from-libsanitizer.patch
+123
View File
@@ -0,0 +1,123 @@
From 29210b168cc458480f71b242ad964ecd79214e38 Mon Sep 17 00:00:00 2001
From: Tamar Christina <tamar.christina@arm.com>
Date: Fri, 21 May 2021 12:16:56 +0100
Subject: [PATCH] libsanitizer: Remove cyclades from libsanitizer
The Linux kernel has removed the interface to cyclades from
the latest kernel headers[1] due to them being orphaned for the
past 13 years.
libsanitizer uses this header when compiling against glibc, but
glibcs itself doesn't seem to have any references to cyclades.
Further more it seems that the driver is broken in the kernel and
the firmware doesn't seem to be available anymore.
As such since this is breaking the build of libsanitizer (and so the
GCC bootstrap[2]) I propose to remove this.
[1] https://lkml.org/lkml/2021/3/2/153
[2] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100379
libsanitizer/ChangeLog:
PR sanitizer/100379
* sanitizer_common/sanitizer_common_interceptors_ioctl.inc: Cherry-pick
llvm-project revision f7c5351552387bd43f6ca3631016d7f0dfe0f135.
* sanitizer_common/sanitizer_platform_limits_posix.cc: Likewise.
* sanitizer_common/sanitizer_platform_limits_posix.h: Likewise.
Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
---
.../sanitizer_common_interceptors_ioctl.inc | 9 ---------
.../sanitizer_platform_limits_posix.cc | 11 -----------
.../sanitizer_platform_limits_posix.h | 10 ----------
3 files changed, 30 deletions(-)
diff --git a/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc b/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
index a68534c5a0a..85ab53e7430 100755
--- a/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
+++ b/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
@@ -361,15 +361,6 @@ static void ioctl_table_fill() {
#if SANITIZER_LINUX && !SANITIZER_ANDROID
// _(SIOCDEVPLIP, WRITE, struct_ifreq_sz); // the same as EQL_ENSLAVE
- _(CYGETDEFTHRESH, WRITE, sizeof(int));
- _(CYGETDEFTIMEOUT, WRITE, sizeof(int));
- _(CYGETMON, WRITE, struct_cyclades_monitor_sz);
- _(CYGETTHRESH, WRITE, sizeof(int));
- _(CYGETTIMEOUT, WRITE, sizeof(int));
- _(CYSETDEFTHRESH, NONE, 0);
- _(CYSETDEFTIMEOUT, NONE, 0);
- _(CYSETTHRESH, NONE, 0);
- _(CYSETTIMEOUT, NONE, 0);
_(EQL_EMANCIPATE, WRITE, struct_ifreq_sz);
_(EQL_ENSLAVE, WRITE, struct_ifreq_sz);
_(EQL_GETMASTRCFG, WRITE, struct_ifreq_sz);
diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
index 5c720b2e700..17f2c78b389 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc
@@ -157,7 +157,6 @@ typedef struct user_fpregs elf_fpregset_t;
# include <sys/procfs.h>
#endif
#include <sys/user.h>
-#include <linux/cyclades.h>
#include <linux/if_eql.h>
#include <linux/if_plip.h>
#include <linux/lp.h>
@@ -464,7 +463,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
#if SANITIZER_LINUX && !SANITIZER_ANDROID
unsigned struct_ax25_parms_struct_sz = sizeof(struct ax25_parms_struct);
- unsigned struct_cyclades_monitor_sz = sizeof(struct cyclades_monitor);
#if EV_VERSION > (0x010000)
unsigned struct_input_keymap_entry_sz = sizeof(struct input_keymap_entry);
#else
@@ -831,15 +829,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
#endif // SANITIZER_LINUX || SANITIZER_FREEBSD
#if SANITIZER_LINUX && !SANITIZER_ANDROID
- unsigned IOCTL_CYGETDEFTHRESH = CYGETDEFTHRESH;
- unsigned IOCTL_CYGETDEFTIMEOUT = CYGETDEFTIMEOUT;
- unsigned IOCTL_CYGETMON = CYGETMON;
- unsigned IOCTL_CYGETTHRESH = CYGETTHRESH;
- unsigned IOCTL_CYGETTIMEOUT = CYGETTIMEOUT;
- unsigned IOCTL_CYSETDEFTHRESH = CYSETDEFTHRESH;
- unsigned IOCTL_CYSETDEFTIMEOUT = CYSETDEFTIMEOUT;
- unsigned IOCTL_CYSETTHRESH = CYSETTHRESH;
- unsigned IOCTL_CYSETTIMEOUT = CYSETTIMEOUT;
unsigned IOCTL_EQL_EMANCIPATE = EQL_EMANCIPATE;
unsigned IOCTL_EQL_ENSLAVE = EQL_ENSLAVE;
unsigned IOCTL_EQL_GETMASTRCFG = EQL_GETMASTRCFG;
diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
index 9c1429623ab..9f05c4e9ea7 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -1004,7 +1004,6 @@ struct __sanitizer_cookie_io_functions_t {
#if SANITIZER_LINUX && !SANITIZER_ANDROID
extern unsigned struct_ax25_parms_struct_sz;
- extern unsigned struct_cyclades_monitor_sz;
extern unsigned struct_input_keymap_entry_sz;
extern unsigned struct_ipx_config_data_sz;
extern unsigned struct_kbdiacrs_sz;
@@ -1349,15 +1348,6 @@ struct __sanitizer_cookie_io_functions_t {
#endif // SANITIZER_LINUX || SANITIZER_FREEBSD
#if SANITIZER_LINUX && !SANITIZER_ANDROID
- extern unsigned IOCTL_CYGETDEFTHRESH;
- extern unsigned IOCTL_CYGETDEFTIMEOUT;
- extern unsigned IOCTL_CYGETMON;
- extern unsigned IOCTL_CYGETTHRESH;
- extern unsigned IOCTL_CYGETTIMEOUT;
- extern unsigned IOCTL_CYSETDEFTHRESH;
- extern unsigned IOCTL_CYSETDEFTIMEOUT;
- extern unsigned IOCTL_CYSETTHRESH;
- extern unsigned IOCTL_CYSETTIMEOUT;
extern unsigned IOCTL_EQL_EMANCIPATE;
extern unsigned IOCTL_EQL_ENSLAVE;
extern unsigned IOCTL_EQL_GETMASTRCFG;
--
2.31.1
package/gcc/9.4.0/0001-or1k-Fix-issue-with-set_got-clobbering-LR-r9.patch
+105
View File
@@ -0,0 +1,105 @@
From 014db5e5febec94e35c13ce89ee6b389328873a1 Mon Sep 17 00:00:00 2001
From: shorne <shorne@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Sat, 31 Aug 2019 06:00:56 +0000
Subject: [PATCH] or1k: Fix issue with set_got clobbering LR (r9)
When compiling glibc we found that the GOT register was being allocated
r9 when the instruction was still set_got_tmp. That is a problem
because r9 is the Link Register (LR) in OpenRISC which is used/clobbered
in set_got. We cannot use r9 as the GOT register. Also, we cannot
simply say set_got_tmp clobbers r9 as this is the reason for having the
temporary set_got_tmp.
Fix by using a register class constraint that does not allow r9 during
register allocation.
gcc/ChangeLog:
* config/or1k/constraints.md (t): New constraint.
* config/or1k/or1k.h (GOT_REGS): New register class.
* config/or1k/or1k.md (set_got_tmp, set_got): Use t contraint.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@275242 138bc75d-0d04-0410-961f-82ee72b054a4
(cherry picked from commit 5b9471ffca25d39635680516ba2ff85295480fc3)
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
gcc/config/or1k/constraints.md | 4 ++++
gcc/config/or1k/or1k.h | 3 +++
gcc/config/or1k/or1k.md | 4 ++--
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/gcc/config/or1k/constraints.md b/gcc/config/or1k/constraints.md
index 93da8c058c6..a16b749008f 100644
--- a/gcc/config/or1k/constraints.md
+++ b/gcc/config/or1k/constraints.md
@@ -24,6 +24,7 @@
; We use:
; c - sibcall registers
+; t - got address registers (excludes LR (r9) which is clobbered by set_got)
; I - constant signed 16-bit
; K - constant unsigned 16-bit
; M - constant signed 16-bit shifted left 16-bits (l.movhi)
@@ -32,6 +33,9 @@
(define_register_constraint "c" "SIBCALL_REGS"
"Registers which can hold a sibling call address")
+(define_register_constraint "t" "GOT_REGS"
+ "Registers which can be used to store the Global Offset Table (GOT) address.")
+
;; Immediates
(define_constraint "I"
"A signed 16-bit immediate in the range -32768 to 32767."
diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
index 6dda230f217..feee702d89c 100644
--- a/gcc/config/or1k/or1k.h
+++ b/gcc/config/or1k/or1k.h
@@ -189,6 +189,7 @@ enum reg_class
{
NO_REGS,
SIBCALL_REGS,
+ GOT_REGS,
GENERAL_REGS,
FLAG_REGS,
ALL_REGS,
@@ -200,6 +201,7 @@ enum reg_class
#define REG_CLASS_NAMES { \
"NO_REGS", \
"SIBCALL_REGS", \
+ "GOT_REGS", \
"GENERAL_REGS", \
"FLAG_REGS", \
"ALL_REGS" }
@@ -212,6 +214,7 @@ enum reg_class
#define REG_CLASS_CONTENTS \
{ { 0x00000000, 0x00000000 }, \
{ SIBCALL_REGS_MASK, 0 }, \
+ { 0xfffffdff, 0x00000000 }, \
{ 0xffffffff, 0x00000003 }, \
{ 0x00000000, 0x00000004 }, \
{ 0xffffffff, 0x00000007 } \
diff --git a/gcc/config/or1k/or1k.md b/gcc/config/or1k/or1k.md
index 2dad51cd46b..88f3f02630f 100644
--- a/gcc/config/or1k/or1k.md
+++ b/gcc/config/or1k/or1k.md
@@ -595,7 +595,7 @@
;; set_got pattern below. This works because the set_got_tmp insn is the
;; first insn in the stream and that it isn't moved during RA.
(define_insn "set_got_tmp"
- [(set (match_operand:SI 0 "register_operand" "=r")
+ [(set (match_operand:SI 0 "register_operand" "=t")
(unspec_volatile:SI [(const_int 0)] UNSPECV_SET_GOT))]
""
{
@@ -604,7 +604,7 @@
;; The insn to initialize the GOT.
(define_insn "set_got"
- [(set (match_operand:SI 0 "register_operand" "=r")
+ [(set (match_operand:SI 0 "register_operand" "=t")
(unspec:SI [(const_int 0)] UNSPEC_SET_GOT))
(clobber (reg:SI LR_REGNUM))]
""
--
2.31.1
package/gcc/9.4.0/0002-gcc-define-_REENTRANT-for-OpenRISC-when-pthread-is-p.patch
+31
View File
@@ -0,0 +1,31 @@
From f80e9941739fb3973b61fc6a5abddef5ad2faf73 Mon Sep 17 00:00:00 2001
From: Bernd Kuhls <bernd.kuhls@t-online.de>
Date: Fri, 27 Mar 2020 21:23:53 +0100
Subject: [PATCH] gcc: define _REENTRANT for OpenRISC when -pthread is passed
The detection of pthread support fails on OpenRISC unless _REENTRANT
is defined. Added the CPP_SPEC definition to correct this.
Patch sent upstream: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94372
Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
---
gcc/config/or1k/linux.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/or1k/linux.h b/gcc/config/or1k/linux.h
index cbdc781418f..36303af892c 100644
--- a/gcc/config/or1k/linux.h
+++ b/gcc/config/or1k/linux.h
@@ -32,6 +32,8 @@
#undef MUSL_DYNAMIC_LINKER
#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-or1k.so.1"
+#define CPP_SPEC "%{pthread:-D_REENTRANT}"
+
#undef LINK_SPEC
#define LINK_SPEC "%{h*} \
%{static:-Bstatic} \
--
2.31.1
package/gcc/9.4.0/0003-Revert-re-PR-target-92095-internal-error-with-O1-mcp.patch
+325
View File
@@ -0,0 +1,325 @@
From 1107ecc3e8af31adc7bbd4e08c0614836bd1cebd Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Wed, 20 Jan 2021 23:22:16 +0100
Subject: [PATCH] Revert "re PR target/92095 (internal error with -O1
-mcpu=niagara2 -fPIE)"
This reverts commit 6bf2990842388101897b6f465524cbc295ee8cf9.
Building the Buildroot defconfig qemu_sparc_ss10_defconfig using
gcc 8.4, 9.3 and 10 produce a broken rootfs that trigger illegal
instruction messages.
gcc 8.3, 9.2 are the latest working gcc version.
git bisect between gcc 8.4 and 8.4 allowed to identify
the commit that introcuce the regression.
Reverting this patch allowed to produce a working rootfs.
Signed-off-by: Romain Naour <romain.naour@gmail.com>
Cc: Eric Botcazou <ebotcazou@gcc.gnu.org>
---
gcc/config/sparc/sparc-protos.h | 1 -
gcc/config/sparc/sparc.c | 121 +++++++-----------
gcc/config/sparc/sparc.md | 5 +-
.../gcc.c-torture/compile/20191108-1.c | 14 --
gcc/testsuite/gcc.target/sparc/overflow-3.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-4.c | 2 +-
gcc/testsuite/gcc.target/sparc/overflow-5.c | 2 +-
7 files changed, 53 insertions(+), 94 deletions(-)
delete mode 100644 gcc/testsuite/gcc.c-torture/compile/20191108-1.c
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index f1c120c4860..f4b6f00a7b1 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -69,7 +69,6 @@ extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
extern int sparc_split_reg_reg_legitimate (rtx, rtx);
extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
-extern const char *output_load_pcrel_sym (rtx *);
extern const char *output_ubranch (rtx, rtx_insn *);
extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
extern const char *output_return (rtx_insn *);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 0553dc501e6..516dcf96d7b 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -4170,6 +4170,13 @@ eligible_for_sibcall_delay (rtx_insn *trial)
static bool
sparc_cannot_force_const_mem (machine_mode mode, rtx x)
{
+ /* After IRA has run in PIC mode, it is too late to put anything into the
+ constant pool if the PIC register hasn't already been initialized. */
+ if ((lra_in_progress || reload_in_progress)
+ && flag_pic
+ && !crtl->uses_pic_offset_table)
+ return true;
+
switch (GET_CODE (x))
{
case CONST_INT:
@@ -4205,11 +4212,9 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
}
/* Global Offset Table support. */
-static GTY(()) rtx got_symbol_rtx = NULL_RTX;
-static GTY(()) rtx got_register_rtx = NULL_RTX;
static GTY(()) rtx got_helper_rtx = NULL_RTX;
-
-static GTY(()) bool got_helper_needed = false;
+static GTY(()) rtx got_register_rtx = NULL_RTX;
+static GTY(()) rtx got_symbol_rtx = NULL_RTX;
/* Return the SYMBOL_REF for the Global Offset Table. */
@@ -4222,6 +4227,27 @@ sparc_got (void)
return got_symbol_rtx;
}
+#ifdef HAVE_GAS_HIDDEN
+# define USE_HIDDEN_LINKONCE 1
+#else
+# define USE_HIDDEN_LINKONCE 0
+#endif
+
+static void
+get_pc_thunk_name (char name[32], unsigned int regno)
+{
+ const char *reg_name = reg_names[regno];
+
+ /* Skip the leading '%' as that cannot be used in a
+ symbol name. */
+ reg_name += 1;
+
+ if (USE_HIDDEN_LINKONCE)
+ sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
+ else
+ ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
+}
+
/* Wrapper around the load_pcrel_sym{si,di} patterns. */
static rtx
@@ -4241,78 +4267,30 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
return insn;
}
-/* Output the load_pcrel_sym{si,di} patterns. */
-
-const char *
-output_load_pcrel_sym (rtx *operands)
-{
- if (flag_delayed_branch)
- {
- output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
- output_asm_insn ("call\t%a2", operands);
- output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
- }
- else
- {
- output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
- output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
- output_asm_insn ("call\t%a2", operands);
- output_asm_insn (" nop", NULL);
- }
-
- if (operands[2] == got_helper_rtx)
- got_helper_needed = true;
-
- return "";
-}
-
-#ifdef HAVE_GAS_HIDDEN
-# define USE_HIDDEN_LINKONCE 1
-#else
-# define USE_HIDDEN_LINKONCE 0
-#endif
-
/* Emit code to load the GOT register. */
void
load_got_register (void)
{
- rtx insn;
+ if (!got_register_rtx)
+ got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
if (TARGET_VXWORKS_RTP)
- {
- if (!got_register_rtx)
- got_register_rtx = pic_offset_table_rtx;
-
- insn = gen_vxworks_load_got ();
- }
+ emit_insn (gen_vxworks_load_got ());
else
{
- if (!got_register_rtx)
- got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
-
/* The GOT symbol is subject to a PC-relative relocation so we need a
helper function to add the PC value and thus get the final value. */
if (!got_helper_rtx)
{
char name[32];
-
- /* Skip the leading '%' as that cannot be used in a symbol name. */
- if (USE_HIDDEN_LINKONCE)
- sprintf (name, "__sparc_get_pc_thunk.%s",
- reg_names[REGNO (got_register_rtx)] + 1);
- else
- ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
- REGNO (got_register_rtx));
-
+ get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
}
- insn
- = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
+ emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
+ got_helper_rtx));
}
-
- emit_insn (insn);
}
/* Ensure that we are not using patterns that are not OK with PIC. */
@@ -5477,7 +5455,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
return true;
/* GOT register (%l7) if needed. */
- if (got_register_rtx && regno == REGNO (got_register_rtx))
+ if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
return true;
/* If the function accesses prior frames, the frame pointer and the return
@@ -12520,9 +12498,10 @@ static void
sparc_file_end (void)
{
/* If we need to emit the special GOT helper function, do so now. */
- if (got_helper_needed)
+ if (got_helper_rtx)
{
const char *name = XSTR (got_helper_rtx, 0);
+ const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
#ifdef DWARF2_UNWIND_INFO
bool do_cfi;
#endif
@@ -12559,22 +12538,17 @@ sparc_file_end (void)
#ifdef DWARF2_UNWIND_INFO
do_cfi = dwarf2out_do_cfi_asm ();
if (do_cfi)
- output_asm_insn (".cfi_startproc", NULL);
+ fprintf (asm_out_file, "\t.cfi_startproc\n");
#endif
if (flag_delayed_branch)
- {
- output_asm_insn ("jmp\t%%o7+8", NULL);
- output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
- }
+ fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
+ reg_name, reg_name);
else
- {
- output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
- output_asm_insn ("jmp\t%%o7+8", NULL);
- output_asm_insn (" nop", NULL);
- }
+ fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
+ reg_name, reg_name);
#ifdef DWARF2_UNWIND_INFO
if (do_cfi)
- output_asm_insn (".cfi_endproc", NULL);
+ fprintf (asm_out_file, "\t.cfi_endproc\n");
#endif
}
@@ -13080,10 +13054,7 @@ sparc_init_pic_reg (void)
edge entry_edge;
rtx_insn *seq;
- /* In PIC mode, we need to always initialize the PIC register if optimization
- is enabled, because we are called from IRA and LRA may later force things
- to the constant pool for optimization purposes. */
- if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
+ if (!crtl->uses_pic_offset_table)
return;
start_sequence ();
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index d9ef79c13cc..6dbd054f1c7 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -1601,7 +1601,10 @@
(clobber (reg:P O7_REG))]
"REGNO (operands[0]) == INTVAL (operands[3])"
{
- return output_load_pcrel_sym (operands);
+ if (flag_delayed_branch)
+ return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
+ else
+ return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
}
[(set (attr "type") (const_string "multi"))
(set (attr "length")
diff --git a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c b/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
deleted file mode 100644
index 7929751bb06..00000000000
--- a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
+++ /dev/null
@@ -1,14 +0,0 @@
-/* PR target/92095 */
-/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
-
-typedef union {
- double a;
- int b[2];
-} c;
-
-double d(int e)
-{
- c f;
- (&f)->b[0] = 15728640;
- return e ? -(&f)->a : (&f)->a;
-}
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-3.c b/gcc/testsuite/gcc.target/sparc/overflow-3.c
index 52d6ab2b688..86dddfb09e6 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-3.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-3.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie" } */
+/* { dg-options "-O" } */
#include <stdbool.h>
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c
index c6121b958c3..019feee335c 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-4.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie -mno-vis3 -mno-vis4" } */
+/* { dg-options "-O -mno-vis3 -mno-vis4" } */
#include <stdbool.h>
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-5.c b/gcc/testsuite/gcc.target/sparc/overflow-5.c
index f00283f6e7b..67d4ac38095 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-5.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-5.c
@@ -1,6 +1,6 @@
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fno-pie -mvis3" } */
+/* { dg-options "-O -mvis3" } */
#include <stdbool.h>
#include <stdint.h>
--
2.31.1
package/gcc/9.4.0/0004-or1k-Add-mcmodel-option-to-handle-large-GOTs.patch
+201
View File
@@ -0,0 +1,201 @@
From 90b202b59fa2bdb68314a23471b32d3e16602bc8 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Sun, 2 May 2021 06:11:44 +0900
Subject: [PATCH] or1k: Add mcmodel option to handle large GOTs
When building libgeos we get an error with:
linux-uclibc/9.3.0/crtbeginS.o: in function `__do_global_dtors_aux':
crtstuff.c:(.text+0x118): relocation truncated to fit: R_OR1K_GOT16 against symbol `__cxa_finalize' defined in .text section in
/home/shorne/work/openrisc/3eb9f9d0f6d8274b2d19753c006bd83f7d536e3c/output/host/or1k-buildroot-linux-uclibc/sysroot/lib/libc.so.
This is caused by GOT code having a limit of 64k. In OpenRISC this
looks to be the only relocation code pattern to be limited to 64k.
This patch allows specifying a new option -mcmodel=large which can be
used to generate 2 more instructions to construct 32-bit addresses for
up to 4G GOTs.
gcc/ChangeLog:
PR 99783
* config/or1k/or1k-opts.h: New file.
* config/or1k/or1k.c (or1k_legitimize_address_1, print_reloc):
Support generating gotha relocations if -mcmodel=large is
specified.
* config/or1k/or1k.h (TARGET_CMODEL_SMALL, TARGET_CMODEL_LARGE):
New macros.
* config/or1k/or1k.opt (mcmodel=): New option.
* doc/invoke.text (OpenRISC Options): Document mcmodel.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
gcc/config/or1k/or1k-opts.h | 30 ++++++++++++++++++++++++++++++
gcc/config/or1k/or1k.c | 11 +++++++++--
gcc/config/or1k/or1k.h | 7 +++++++
gcc/config/or1k/or1k.opt | 19 +++++++++++++++++++
gcc/doc/invoke.texi | 13 ++++++++++++-
5 files changed, 77 insertions(+), 3 deletions(-)
create mode 100644 gcc/config/or1k/or1k-opts.h
diff --git a/gcc/config/or1k/or1k-opts.h b/gcc/config/or1k/or1k-opts.h
new file mode 100644
index 00000000000..f791b894fdd
--- /dev/null
+++ b/gcc/config/or1k/or1k-opts.h
@@ -0,0 +1,30 @@
+/* Definitions for option handling for OpenRISC.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Stafford Horne.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_OR1K_OPTS_H
+#define GCC_OR1K_OPTS_H
+
+/* The OpenRISC code generation models available. */
+enum or1k_cmodel_type {
+ CMODEL_SMALL,
+ CMODEL_LARGE
+};
+
+#endif /* GCC_OR1K_OPTS_H */
diff --git a/gcc/config/or1k/or1k.c b/gcc/config/or1k/or1k.c
index fc10fcfabde..df67d72b139 100644
--- a/gcc/config/or1k/or1k.c
+++ b/gcc/config/or1k/or1k.c
@@ -750,7 +750,14 @@ or1k_legitimize_address_1 (rtx x, rtx scratch)
{
base = gen_sym_unspec (base, UNSPEC_GOT);
crtl->uses_pic_offset_table = 1;
- t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
+ if (TARGET_CMODEL_LARGE)
+ {
+ emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, base)));
+ emit_insn (gen_add3_insn (t1, t1, pic_offset_table_rtx));
+ t2 = gen_rtx_LO_SUM (Pmode, t1, base);
+ }
+ else
+ t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
t2 = gen_const_mem (Pmode, t2);
emit_insn (gen_rtx_SET (t1, t2));
base = t1;
@@ -1097,7 +1104,7 @@ print_reloc (FILE *stream, rtx x, HOST_WIDE_INT add, reloc_kind kind)
no special markup. */
static const char * const relocs[RKIND_MAX][RTYPE_MAX] = {
{ "lo", "got", "gotofflo", "tpofflo", "gottpofflo", "tlsgdlo" },
- { "ha", NULL, "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
+ { "ha", "gotha", "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
};
reloc_type type = RTYPE_DIRECT;
diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
index feee702d89c..dbaf0d0fe4c 100644
--- a/gcc/config/or1k/or1k.h
+++ b/gcc/config/or1k/or1k.h
@@ -21,6 +21,8 @@
#ifndef GCC_OR1K_H
#define GCC_OR1K_H
+#include "config/or1k/or1k-opts.h"
+
/* Names to predefine in the preprocessor for this target machine. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
@@ -35,6 +37,11 @@
} \
while (0)
+#define TARGET_CMODEL_SMALL \
+ (or1k_code_model == CMODEL_SMALL)
+#define TARGET_CMODEL_LARGE \
+ (or1k_code_model == CMODEL_LARGE)
+
/* Storage layout. */
#define DEFAULT_SIGNED_CHAR 1
diff --git a/gcc/config/or1k/or1k.opt b/gcc/config/or1k/or1k.opt
index 7bdbd842dd4..116524c3441 100644
--- a/gcc/config/or1k/or1k.opt
+++ b/gcc/config/or1k/or1k.opt
@@ -23,6 +23,9 @@
; Please try to keep this file in ASCII collating order.
+HeaderInclude
+config/or1k/or1k-opts.h
+
mhard-div
Target RejectNegative InverseMask(SOFT_DIV)
Use hardware divide instructions, use -msoft-div for emulation.
@@ -31,6 +34,22 @@ mhard-mul
Target RejectNegative InverseMask(SOFT_MUL).
Use hardware multiply instructions, use -msoft-mul for emulation.
+mcmodel=
+Target RejectNegative Joined Enum(or1k_cmodel_type) Var(or1k_code_model) Init(CMODEL_SMALL)
+Specify the code model used for accessing memory addresses. Specifying large
+enables generating binaries with large global offset tables. By default the
+value is small.
+
+Enum
+Name(or1k_cmodel_type) Type(enum or1k_cmodel_type)
+Known code model types (for use with the -mcmodel= option):
+
+EnumValue
+Enum(or1k_cmodel_type) String(small) Value(CMODEL_SMALL)
+
+EnumValue
+Enum(or1k_cmodel_type) String(large) Value(CMODEL_LARGE)
+
mcmov
Target RejectNegative Mask(CMOV)
Allows generation of binaries which use the l.cmov instruction. If your target
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 7b5f6e03d9f..683c64417af 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1032,7 +1032,9 @@ Objective-C and Objective-C++ Dialects}.
@emph{OpenRISC Options}
@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol
-msoft-mul -msoft-div @gol
--mcmov -mror -msext -msfimm -mshftimm}
+-mcmov -mror -mrori -msext -msfimm -mshftimm @gol
+-mcmodel=@var{code-model}}
+
@emph{PDP-11 Options}
@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
@@ -27462,6 +27464,15 @@ MWAITX, SHA, CLZERO, AES, PCL_MUL, CX16, MOVBE, MMX, SSE, SSE2, SSE3, SSE4A,
SSSE3, SSE4.1, SSE4.2, ABM, XSAVEC, XSAVES, CLFLUSHOPT, POPCNT, and 64-bit
instruction set extensions.)
+@item -mcmodel=small
+@opindex mcmodel=small
+Generate OpenRISC code for the small model: The GOT is limited to 64k. This is
+the default model.
+
+@item -mcmodel=large
+@opindex mcmodel=large
+Generate OpenRISC code for the large model: The GOT may grow up to 4G in size.
+
@item btver1
CPUs based on AMD Family 14h cores with x86-64 instruction set support. (This
--
2.31.1
package/gcc/9.4.0/0005-or1k-Use-cmodel-large-when-building-crtstuff.patch
+60
View File
@@ -0,0 +1,60 @@
From d64a757040fe36b0d9dc65d24107c656f66bc8e5 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Sun, 2 May 2021 06:11:45 +0900
Subject: [PATCH] or1k: Use cmodel=large when building crtstuff
When linking gcc runtime objects into large binaries the link may fail
with the below errors. This will happen even if we are building with
-mcmodel=large.
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `deregister_tm_clones':
crtstuff.c:(.text+0x3c): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_deregisterTMCloneTable'
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `register_tm_clones':
crtstuff.c:(.text+0xc0): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_registerTMCloneTable'
This patch builds the gcc crtstuff binaries always with the
-mcmodel=large option to ensure they can be linked into large binaries.
libgcc/ChangeLog:
PR 99783
* config.host (or1k-*, tmake_file): Add or1k/t-crtstuff.
* config/or1k/t-crtstuff: New file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
libgcc/config.host | 4 ++--
libgcc/config/or1k/t-crtstuff | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
create mode 100644 libgcc/config/or1k/t-crtstuff
diff --git a/libgcc/config.host b/libgcc/config.host
index bdbf77a3e62..bfb45a90630 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1061,12 +1061,12 @@ nios2-*-*)
extra_parts="$extra_parts crti.o crtn.o"
;;
or1k-*-linux*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
md_unwind_header=or1k/linux-unwind.h
;;
or1k-*-*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
;;
pdp11-*-*)
diff --git a/libgcc/config/or1k/t-crtstuff b/libgcc/config/or1k/t-crtstuff
new file mode 100644
index 00000000000..dcae7f3498e
--- /dev/null
+++ b/libgcc/config/or1k/t-crtstuff
@@ -0,0 +1,2 @@
+# Compile crtbeginS.o and crtendS.o with -mcmodel=large
+CRTSTUFF_T_CFLAGS_S += -mcmodel=large
--
2.31.1
package/gcc/Config.in.host
+149
View File
@@ -0,0 +1,149 @@
comment "GCC Options"
choice
prompt "GCC compiler Version"
default BR2_GCC_VERSION_ARC if BR2_arc
default BR2_GCC_VERSION_POWERPC_SPE if BR2_powerpc_SPE
default BR2_GCC_VERSION_10_X
help
Select the version of gcc you wish to use.
config BR2_GCC_VERSION_ARC
bool "gcc arc (10.x)"
# Only supported architecture
depends on BR2_arc
select BR2_TOOLCHAIN_GCC_AT_LEAST_9
config BR2_GCC_VERSION_POWERPC_SPE
bool "gcc powerpc spe"
# powerpc spe support has been deprecated since gcc 8.x.
# https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
depends on BR2_powerpc_SPE
select BR2_TOOLCHAIN_GCC_AT_LEAST_8
config BR2_GCC_VERSION_9_X
bool "gcc 9.x"
depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_10
# powerpc spe support has been deprecated since gcc 8.x.
# https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
depends on !BR2_powerpc_SPE
# C-SKY sk610 needs abiv1, which is not supported in
# upstream gcc. C-SKY gcc upstream support not tested
# with upstream binutils and glibc.
depends on !BR2_csky
select BR2_TOOLCHAIN_GCC_AT_LEAST_9
config BR2_GCC_VERSION_10_X
bool "gcc 10.x"
depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_11
# powerpc spe support has been deprecated since gcc 8.x.
# https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
depends on !BR2_powerpc_SPE
# C-SKY sk610 needs abiv1, which is not supported in
# upstream gcc. C-SKY gcc upstream support not tested
# with upstream binutils and glibc.
depends on !BR2_csky
select BR2_TOOLCHAIN_GCC_AT_LEAST_10
config BR2_GCC_VERSION_11_X
bool "gcc 11.x"
# powerpc spe support has been deprecated since gcc 8.x.
# https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
depends on !BR2_powerpc_SPE
# uClibc-ng broken on sparc due to recent gcc changes
# that need to be reverted since gcc 8.4, 9.3 and 10.1.
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
depends on !BR2_sparc
select BR2_TOOLCHAIN_GCC_AT_LEAST_11
endchoice
# libcilkrts was introduced in gcc 4.9 and removed in gcc 8.x
config BR2_GCC_SUPPORTS_LIBCILKRTS
bool
default y if !BR2_TOOLCHAIN_GCC_AT_LEAST_8
config BR2_GCC_SUPPORTS_DLANG
bool
default y if BR2_aarch64
default y if BR2_arm
default y if BR2_i386
default y if BR2_mips || BR2_mipsel
default y if BR2_mips64 || BR2_mips64el
default y if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
default y if BR2_x86_64
default y if BR2_riscv && !BR2_RISCV_64
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_9
depends on BR2_TOOLCHAIN_USES_GLIBC
config BR2_GCC_VERSION
string
default "8.4.0" if BR2_GCC_VERSION_POWERPC_SPE
default "9.4.0" if BR2_GCC_VERSION_9_X
default "10.3.0" if BR2_GCC_VERSION_10_X
default "11.2.0" if BR2_GCC_VERSION_11_X
default "arc-2020.09-release" if BR2_GCC_VERSION_ARC
config BR2_EXTRA_GCC_CONFIG_OPTIONS
string "Additional gcc options"
default ""
help
Any additional gcc configure options you may want to
include. Those options are applied for all of the gcc
initial, gcc intermediate and gcc final passes.
config BR2_TOOLCHAIN_BUILDROOT_CXX
bool "Enable C++ support"
select BR2_INSTALL_LIBSTDCPP
help
Enable this option if you want your toolchain to support the
C++ language and you want C++ libraries to be installed on
your target system.
comment "Fortran support needs a toolchain w/ wchar"
depends on BR2_TOOLCHAIN_HAS_LIBQUADMATH
depends on !BR2_USE_WCHAR # libquadmath
config BR2_TOOLCHAIN_BUILDROOT_FORTRAN
bool "Enable Fortran support"
# on architecture building libquadmath, wchar is required
depends on !BR2_TOOLCHAIN_HAS_LIBQUADMATH || \
(BR2_TOOLCHAIN_HAS_LIBQUADMATH && BR2_USE_WCHAR)
select BR2_TOOLCHAIN_HAS_FORTRAN
help
Enable this option if you want your toolchain to support the
Fortran language and you want Fortran libraries to be
installed on your target system.
config BR2_TOOLCHAIN_BUILDROOT_DLANG
bool "Enable D language support"
depends on BR2_GCC_SUPPORTS_DLANG
select BR2_TOOLCHAIN_HAS_DLANG
help
Enable this option if you want your toolchain to support the
D language and you want D libraries to be installed on your
target system.
config BR2_GCC_ENABLE_LTO
bool "Enable compiler link-time-optimization support"
select BR2_BINUTILS_ENABLE_LTO
help
This option enables link-time optimization (LTO) support in
gcc.
config BR2_GCC_ENABLE_OPENMP
bool "Enable compiler OpenMP support"
depends on !BR2_PTHREADS_NONE && !BR2_arc && !BR2_microblaze
select BR2_TOOLCHAIN_HAS_OPENMP
help
Enable OpenMP support for the compiler
config BR2_GCC_ENABLE_GRAPHITE
bool "Enable graphite support"
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_5
help
This option enables the graphite optimizations in the
compiler.
comment "graphite support needs gcc >= 5.x"
depends on !BR2_TOOLCHAIN_GCC_AT_LEAST_5
package/gcc/arc-2020.09-release/0001-arc-Refurbish-adc-sbc-patterns.patch
+243
View File
@@ -0,0 +1,243 @@
From b92c22b144d063c4436a6693045ceb57d344c495 Mon Sep 17 00:00:00 2001
From: Claudiu Zissulescu <claziss@synopsys.com>
Date: Wed, 11 Nov 2020 12:31:10 +0200
Subject: [PATCH] arc: Refurbish adc/sbc patterns
The adc/sbc patterns were unecessary spliting, remove that and
associated functions.
gcc/ChangeLog:
2020-10-11 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (arc_scheduling_not_expected): Remove
it.
(arc_sets_cc_p): Likewise.
(arc_need_delay): Likewise.
* config/arc/arc.c (arc_sets_cc_p): Likewise.
(arc_need_delay): Likewise.
(arc_scheduling_not_expected): Likewise.
* config/arc/arc.md: Convert adc/sbc patterns to simple
instruction definitions.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Downloaded from upstream commit
https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/commit/b92c22b144d063c4436a6693045ceb57d344c495
Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
---
gcc/config/arc/arc-protos.h | 3 --
gcc/config/arc/arc.c | 53 ---------------------
gcc/config/arc/arc.md | 95 +++++++++++--------------------------
3 files changed, 29 insertions(+), 122 deletions(-)
diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h
index c72d78e3b9e..de4cf47c818 100644
--- a/gcc/config/arc/arc-protos.h
+++ b/gcc/config/arc/arc-protos.h
@@ -90,10 +90,7 @@ extern void split_subsi (rtx *);
extern void arc_split_move (rtx *);
extern const char *arc_short_long (rtx_insn *insn, const char *, const char *);
extern rtx arc_regno_use_in (unsigned int, rtx);
-extern bool arc_scheduling_not_expected (void);
-extern bool arc_sets_cc_p (rtx_insn *insn);
extern int arc_label_align (rtx_insn *label);
-extern bool arc_need_delay (rtx_insn *insn);
extern bool arc_text_label (rtx_insn *insn);
extern bool arc_short_comparison_p (rtx, int);
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 5a7b0cb6696..c3ee9181f93 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -10341,59 +10341,6 @@ arc_attr_type (rtx_insn *insn)
return get_attr_type (insn);
}
-/* Return true if insn sets the condition codes. */
-
-bool
-arc_sets_cc_p (rtx_insn *insn)
-{
- if (NONJUMP_INSN_P (insn))
- if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
- insn = seq->insn (seq->len () - 1);
- return arc_attr_type (insn) == TYPE_COMPARE;
-}
-
-/* Return true if INSN is an instruction with a delay slot we may want
- to fill. */
-
-bool
-arc_need_delay (rtx_insn *insn)
-{
- rtx_insn *next;
-
- if (!flag_delayed_branch)
- return false;
- /* The return at the end of a function needs a delay slot. */
- if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
- && (!(next = next_active_insn (insn))
- || ((!NONJUMP_INSN_P (next) || GET_CODE (PATTERN (next)) != SEQUENCE)
- && arc_attr_type (next) == TYPE_RETURN))
- && (!TARGET_PAD_RETURN
- || (prev_active_insn (insn)
- && prev_active_insn (prev_active_insn (insn))
- && prev_active_insn (prev_active_insn (prev_active_insn (insn))))))
- return true;
- if (NONJUMP_INSN_P (insn)
- ? (GET_CODE (PATTERN (insn)) == USE
- || GET_CODE (PATTERN (insn)) == CLOBBER
- || GET_CODE (PATTERN (insn)) == SEQUENCE)
- : JUMP_P (insn)
- ? (GET_CODE (PATTERN (insn)) == ADDR_VEC
- || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
- : !CALL_P (insn))
- return false;
- return num_delay_slots (insn) != 0;
-}
-
-/* Return true if the scheduling pass(es) has/have already run,
- i.e. where possible, we should try to mitigate high latencies
- by different instruction selection. */
-
-bool
-arc_scheduling_not_expected (void)
-{
- return cfun->machine->arc_reorg_started;
-}
-
/* Code has a minimum p2 alignment of 1, which we must restore after
an ADDR_DIFF_VEC. */
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index f91adbc0d94..c635b69ddd5 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -2847,43 +2847,25 @@ archs4x, archs4xd"
(set_attr "type" "compare")
(set_attr "length" "4,4,8")])
-; w/c/c comes first (rather than w/0/C_0) to prevent the middle-end
-; needlessly prioritizing the matching constraint.
-; Rcw/0/C_0 comes before w/c/L so that the lower latency conditional
-; execution is used where possible.
-(define_insn_and_split "adc"
- [(set (match_operand:SI 0 "dest_reg_operand" "=w,Rcw,w,Rcw,w")
- (plus:SI (plus:SI (ltu:SI (reg:CC_C CC_REG) (const_int 0))
- (match_operand:SI 1 "nonmemory_operand"
- "%c,0,c,0,cCal"))
- (match_operand:SI 2 "nonmemory_operand" "c,C_0,L,I,cCal")))]
+(define_insn "adc"
+ [(set (match_operand:SI 0 "register_operand" "=r, r,r,r, r,r")
+ (plus:SI
+ (plus:SI
+ (ltu:SI (reg:CC_C CC_REG) (const_int 0))
+ (match_operand:SI 1 "nonmemory_operand" "%r, 0,r,0,Cal,r"))
+ (match_operand:SI 2 "nonmemory_operand" "r,C_0,L,I, r,Cal")))]
"register_operand (operands[1], SImode)
|| register_operand (operands[2], SImode)"
"@
- adc %0,%1,%2
- add.cs %0,%1,1
- adc %0,%1,%2
- adc %0,%1,%2
- adc %0,%1,%2"
- ; if we have a bad schedule after sched2, split.
- "reload_completed
- && !optimize_size && (!TARGET_ARC600_FAMILY)
- && arc_scheduling_not_expected ()
- && arc_sets_cc_p (prev_nonnote_insn (insn))
- /* If next comes a return or other insn that needs a delay slot,
- expect the adc to get into the delay slot. */
- && next_nonnote_insn (insn)
- && !arc_need_delay (next_nonnote_insn (insn))
- /* Restore operands before emitting. */
- && (extract_insn_cached (insn), 1)"
- [(set (match_dup 0) (match_dup 3))
- (cond_exec
- (ltu (reg:CC_C CC_REG) (const_int 0))
- (set (match_dup 0) (plus:SI (match_dup 0) (const_int 1))))]
- "operands[3] = simplify_gen_binary (PLUS, SImode, operands[1], operands[2]);"
+ adc\\t%0,%1,%2
+ add.cs\\t%0,%1,1
+ adc\\t%0,%1,%2
+ adc\\t%0,%1,%2
+ adc\\t%0,%1,%2
+ adc\\t%0,%1,%2"
[(set_attr "cond" "use")
(set_attr "type" "cc_arith")
- (set_attr "length" "4,4,4,4,8")])
+ (set_attr "length" "4,4,4,4,8,8")])
; combiner-splitter cmp / scc -> cmp / adc
(define_split
@@ -3015,7 +2997,7 @@ archs4x, archs4xd"
DONE;
}
emit_insn (gen_sub_f (l0, l1, l2));
- emit_insn (gen_sbc (h0, h1, h2, gen_rtx_REG (CCmode, CC_REG)));
+ emit_insn (gen_sbc (h0, h1, h2));
DONE;
")
@@ -3030,44 +3012,25 @@ archs4x, archs4xd"
(set_attr "type" "cc_arith")
(set_attr "length" "4")])
-; w/c/c comes first (rather than Rcw/0/C_0) to prevent the middle-end
-; needlessly prioritizing the matching constraint.
-; Rcw/0/C_0 comes before w/c/L so that the lower latency conditional execution
-; is used where possible.
-(define_insn_and_split "sbc"
- [(set (match_operand:SI 0 "dest_reg_operand" "=w,Rcw,w,Rcw,w")
- (minus:SI (minus:SI (match_operand:SI 1 "nonmemory_operand"
- "c,0,c,0,cCal")
- (ltu:SI (match_operand:CC_C 3 "cc_use_register")
- (const_int 0)))
- (match_operand:SI 2 "nonmemory_operand" "c,C_0,L,I,cCal")))]
+(define_insn "sbc"
+ [(set (match_operand:SI 0 "dest_reg_operand" "=r,r,r,r,r,r")
+ (minus:SI
+ (minus:SI
+ (match_operand:SI 1 "nonmemory_operand" "r, 0,r,0, r,Cal")
+ (ltu:SI (reg:CC_C CC_REG) (const_int 0)))
+ (match_operand:SI 2 "nonmemory_operand" "r,C_0,L,I,Cal,r")))]
"register_operand (operands[1], SImode)
|| register_operand (operands[2], SImode)"
"@
- sbc %0,%1,%2
- sub.cs %0,%1,1
- sbc %0,%1,%2
- sbc %0,%1,%2
- sbc %0,%1,%2"
- ; if we have a bad schedule after sched2, split.
- "reload_completed
- && !optimize_size && (!TARGET_ARC600_FAMILY)
- && arc_scheduling_not_expected ()
- && arc_sets_cc_p (prev_nonnote_insn (insn))
- /* If next comes a return or other insn that needs a delay slot,
- expect the adc to get into the delay slot. */
- && next_nonnote_insn (insn)
- && !arc_need_delay (next_nonnote_insn (insn))
- /* Restore operands before emitting. */
- && (extract_insn_cached (insn), 1)"
- [(set (match_dup 0) (match_dup 4))
- (cond_exec
- (ltu (reg:CC_C CC_REG) (const_int 0))
- (set (match_dup 0) (plus:SI (match_dup 0) (const_int -1))))]
- "operands[4] = simplify_gen_binary (MINUS, SImode, operands[1], operands[2]);"
+ sbc\\t%0,%1,%2
+ sub.cs\\t%0,%1,1
+ sbc\\t%0,%1,%2
+ sbc\\t%0,%1,%2
+ sbc\\t%0,%1,%2
+ sbc\\t%0,%1,%2"
[(set_attr "cond" "use")
(set_attr "type" "cc_arith")
- (set_attr "length" "4,4,4,4,8")])
+ (set_attr "length" "4,4,4,4,8,8")])
(define_insn "sub_f"
[(set (reg:CC CC_REG)
package/gcc/arc-2020.09-release/0002-libsanitizer-Remove-cyclades-from-libsanitizer.patch
+121
View File
@@ -0,0 +1,121 @@
From 1557c3d919623a95c2aa090d3018c31401f63f88 Mon Sep 17 00:00:00 2001
From: Tamar Christina <tamar.christina@arm.com>
Date: Fri, 21 May 2021 12:16:56 +0100
Subject: [PATCH] libsanitizer: Remove cyclades from libsanitizer
The Linux kernel has removed the interface to cyclades from
the latest kernel headers[1] due to them being orphaned for the
past 13 years.
libsanitizer uses this header when compiling against glibc, but
glibcs itself doesn't seem to have any references to cyclades.
Further more it seems that the driver is broken in the kernel and
the firmware doesn't seem to be available anymore.
As such since this is breaking the build of libsanitizer (and so the
GCC bootstrap[2]) I propose to remove this.
[1] https://lkml.org/lkml/2021/3/2/153
[2] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100379
libsanitizer/ChangeLog:
PR sanitizer/100379
* sanitizer_common/sanitizer_common_interceptors_ioctl.inc: Cherry-pick
llvm-project revision f7c5351552387bd43f6ca3631016d7f0dfe0f135.
* sanitizer_common/sanitizer_platform_limits_posix.cc: Likewise.
* sanitizer_common/sanitizer_platform_limits_posix.h: Likewise.
---
.../sanitizer_common_interceptors_ioctl.inc | 9 ---------
.../sanitizer_platform_limits_posix.cpp | 11 -----------
.../sanitizer_platform_limits_posix.h | 10 ----------
3 files changed, 30 deletions(-)
diff --git a/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc b/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
index 490a04b2181..42e43a04441 100644
--- a/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
+++ b/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
@@ -366,15 +366,6 @@ static void ioctl_table_fill() {
#if SANITIZER_LINUX && !SANITIZER_ANDROID
// _(SIOCDEVPLIP, WRITE, struct_ifreq_sz); // the same as EQL_ENSLAVE
- _(CYGETDEFTHRESH, WRITE, sizeof(int));
- _(CYGETDEFTIMEOUT, WRITE, sizeof(int));
- _(CYGETMON, WRITE, struct_cyclades_monitor_sz);
- _(CYGETTHRESH, WRITE, sizeof(int));
- _(CYGETTIMEOUT, WRITE, sizeof(int));
- _(CYSETDEFTHRESH, NONE, 0);
- _(CYSETDEFTIMEOUT, NONE, 0);
- _(CYSETTHRESH, NONE, 0);
- _(CYSETTIMEOUT, NONE, 0);
_(EQL_EMANCIPATE, WRITE, struct_ifreq_sz);
_(EQL_ENSLAVE, WRITE, struct_ifreq_sz);
_(EQL_GETMASTRCFG, WRITE, struct_ifreq_sz);
diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
index aa845df4dde..badf6a401cc 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
@@ -130,7 +130,6 @@ typedef struct user_fpregs elf_fpregset_t;
# include <sys/procfs.h>
#endif
#include <sys/user.h>
-#include <linux/cyclades.h>
#include <linux/if_eql.h>
#include <linux/if_plip.h>
#include <linux/lp.h>
@@ -443,7 +442,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
#if SANITIZER_LINUX && !SANITIZER_ANDROID
unsigned struct_ax25_parms_struct_sz = sizeof(struct ax25_parms_struct);
- unsigned struct_cyclades_monitor_sz = sizeof(struct cyclades_monitor);
#if EV_VERSION > (0x010000)
unsigned struct_input_keymap_entry_sz = sizeof(struct input_keymap_entry);
#else
@@ -809,15 +807,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
#endif // SANITIZER_LINUX
#if SANITIZER_LINUX && !SANITIZER_ANDROID
- unsigned IOCTL_CYGETDEFTHRESH = CYGETDEFTHRESH;
- unsigned IOCTL_CYGETDEFTIMEOUT = CYGETDEFTIMEOUT;
- unsigned IOCTL_CYGETMON = CYGETMON;
- unsigned IOCTL_CYGETTHRESH = CYGETTHRESH;
- unsigned IOCTL_CYGETTIMEOUT = CYGETTIMEOUT;
- unsigned IOCTL_CYSETDEFTHRESH = CYSETDEFTHRESH;
- unsigned IOCTL_CYSETDEFTIMEOUT = CYSETDEFTIMEOUT;
- unsigned IOCTL_CYSETTHRESH = CYSETTHRESH;
- unsigned IOCTL_CYSETTIMEOUT = CYSETTIMEOUT;
unsigned IOCTL_EQL_EMANCIPATE = EQL_EMANCIPATE;
unsigned IOCTL_EQL_ENSLAVE = EQL_ENSLAVE;
unsigned IOCTL_EQL_GETMASTRCFG = EQL_GETMASTRCFG;
diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
index d82fd5e4005..dc6423bc297 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -974,7 +974,6 @@ extern unsigned struct_vt_mode_sz;
#if SANITIZER_LINUX && !SANITIZER_ANDROID
extern unsigned struct_ax25_parms_struct_sz;
-extern unsigned struct_cyclades_monitor_sz;
extern unsigned struct_input_keymap_entry_sz;
extern unsigned struct_ipx_config_data_sz;
extern unsigned struct_kbdiacrs_sz;
@@ -1319,15 +1318,6 @@ extern unsigned IOCTL_VT_WAITACTIVE;
#endif // SANITIZER_LINUX
#if SANITIZER_LINUX && !SANITIZER_ANDROID
-extern unsigned IOCTL_CYGETDEFTHRESH;
-extern unsigned IOCTL_CYGETDEFTIMEOUT;
-extern unsigned IOCTL_CYGETMON;
-extern unsigned IOCTL_CYGETTHRESH;
-extern unsigned IOCTL_CYGETTIMEOUT;
-extern unsigned IOCTL_CYSETDEFTHRESH;
-extern unsigned IOCTL_CYSETDEFTIMEOUT;
-extern unsigned IOCTL_CYSETTHRESH;
-extern unsigned IOCTL_CYSETTIMEOUT;
extern unsigned IOCTL_EQL_EMANCIPATE;
extern unsigned IOCTL_EQL_ENSLAVE;
extern unsigned IOCTL_EQL_GETMASTRCFG;
--
2.31.1
package/gcc/arc-2020.09-release/0100-uclibc-conf.patch
+29
View File
@@ -0,0 +1,29 @@
From 326b880b20e5f8187dbda736b4c4c662cbfb00ca Mon Sep 17 00:00:00 2001
From: Romain Naour <romain.naour@gmail.com>
Date: Tue, 2 May 2017 22:36:15 +0200
Subject: [PATCH] uclibc-conf
[Romain: convert to git patch]
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
contrib/regression/objs-gcc.sh | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/contrib/regression/objs-gcc.sh b/contrib/regression/objs-gcc.sh
index 60b0497..6dc7ead 100755
--- a/contrib/regression/objs-gcc.sh
+++ b/contrib/regression/objs-gcc.sh
@@ -106,6 +106,10 @@ if [ $H_REAL_TARGET = $H_REAL_HOST -a $H_REAL_TARGET = i686-pc-linux-gnu ]
then
make all-gdb all-dejagnu all-ld || exit 1
make install-gdb install-dejagnu install-ld || exit 1
+elif [ $H_REAL_TARGET = $H_REAL_HOST -a $H_REAL_TARGET = i686-pc-linux-uclibc ]
+ then
+ make all-gdb all-dejagnu all-ld || exit 1
+ make install-gdb install-dejagnu install-ld || exit 1
elif [ $H_REAL_TARGET = $H_REAL_HOST ] ; then
make bootstrap || exit 1
make install || exit 1
--
2.9.3
package/gcc/gcc-final/gcc-final.hash
Symlink
+1
View File
@@ -0,0 +1 @@
../gcc.hash
package/gcc/gcc-final/gcc-final.mk
+219
View File
@@ -0,0 +1,219 @@
################################################################################
#
# gcc-final
#
################################################################################
GCC_FINAL_VERSION = $(GCC_VERSION)
GCC_FINAL_SITE = $(GCC_SITE)
GCC_FINAL_SOURCE = $(GCC_SOURCE)
HOST_GCC_FINAL_DL_SUBDIR = gcc
HOST_GCC_FINAL_DEPENDENCIES = \
$(HOST_GCC_COMMON_DEPENDENCIES) \
$(BR_LIBC)
HOST_GCC_FINAL_EXCLUDES = $(HOST_GCC_EXCLUDES)
ifneq ($(ARCH_XTENSA_OVERLAY_FILE),)
HOST_GCC_FINAL_POST_EXTRACT_HOOKS += HOST_GCC_XTENSA_OVERLAY_EXTRACT
HOST_GCC_FINAL_EXTRA_DOWNLOADS += $(ARCH_XTENSA_OVERLAY_URL)
endif
HOST_GCC_FINAL_POST_PATCH_HOOKS += HOST_GCC_APPLY_PATCHES
# gcc doesn't support in-tree build, so we create a 'build'
# subdirectory in the gcc sources, and build from there.
HOST_GCC_FINAL_SUBDIR = build
HOST_GCC_FINAL_PRE_CONFIGURE_HOOKS += HOST_GCC_CONFIGURE_SYMLINK
# We want to always build the static variants of all the gcc libraries,
# of which libstdc++, libgomp, libmudflap...
# To do so, we can not just pass --enable-static to override the generic
# --disable-static flag, otherwise gcc fails to build some of those
# libraries, see;
# http://lists.busybox.net/pipermail/buildroot/2013-October/080412.html
#
# So we must completely override the generic commands and provide our own.
#
define HOST_GCC_FINAL_CONFIGURE_CMDS
(cd $(HOST_GCC_FINAL_SRCDIR) && rm -rf config.cache; \
$(HOST_CONFIGURE_OPTS) \
CFLAGS="$(HOST_CFLAGS)" \
LDFLAGS="$(HOST_LDFLAGS)" \
$(HOST_GCC_FINAL_CONF_ENV) \
./configure \
--prefix="$(HOST_DIR)" \
--sysconfdir="$(HOST_DIR)/etc" \
--enable-static \
$(QUIET) $(HOST_GCC_FINAL_CONF_OPTS) \
)
endef
# Languages supported by the cross-compiler
GCC_FINAL_CROSS_LANGUAGES-y = c
GCC_FINAL_CROSS_LANGUAGES-$(BR2_INSTALL_LIBSTDCPP) += c++
GCC_FINAL_CROSS_LANGUAGES-$(BR2_TOOLCHAIN_BUILDROOT_DLANG) += d
GCC_FINAL_CROSS_LANGUAGES-$(BR2_TOOLCHAIN_BUILDROOT_FORTRAN) += fortran
GCC_FINAL_CROSS_LANGUAGES = $(subst $(space),$(comma),$(GCC_FINAL_CROSS_LANGUAGES-y))
HOST_GCC_FINAL_CONF_OPTS = \
$(HOST_GCC_COMMON_CONF_OPTS) \
--enable-languages=$(GCC_FINAL_CROSS_LANGUAGES) \
--with-build-time-tools=$(HOST_DIR)/$(GNU_TARGET_NAME)/bin
# The kernel wants to use the -m4-nofpu option to make sure that it
# doesn't use floating point operations.
ifeq ($(BR2_sh4)$(BR2_sh4eb),y)
HOST_GCC_FINAL_CONF_OPTS += "--with-multilib-list=m4,m4-nofpu"
HOST_GCC_FINAL_GCC_LIB_DIR = $(HOST_DIR)/$(GNU_TARGET_NAME)/lib/!m4*
else ifeq ($(BR2_sh4a)$(BR2_sh4aeb),y)
HOST_GCC_FINAL_CONF_OPTS += "--with-multilib-list=m4a,m4a-nofpu"
HOST_GCC_FINAL_GCC_LIB_DIR = $(HOST_DIR)/$(GNU_TARGET_NAME)/lib/!m4*
else
HOST_GCC_FINAL_GCC_LIB_DIR = $(HOST_DIR)/$(GNU_TARGET_NAME)/lib*
endif
ifeq ($(BR2_GCC_SUPPORTS_LIBCILKRTS),y)
# libcilkrts does not support v8
ifeq ($(BR2_sparc),y)
HOST_GCC_FINAL_CONF_OPTS += --disable-libcilkrts
endif
# Pthreads are required to build libcilkrts
ifeq ($(BR2_PTHREADS_NONE),y)
HOST_GCC_FINAL_CONF_OPTS += --disable-libcilkrts
endif
ifeq ($(BR2_STATIC_LIBS),y)
# disable libcilkrts as there is no static version
HOST_GCC_FINAL_CONF_OPTS += --disable-libcilkrts
endif
endif # BR2_GCC_SUPPORTS_LIBCILKRTS
# Disable shared libs like libstdc++ if we do static since it confuses linking
ifeq ($(BR2_STATIC_LIBS),y)
HOST_GCC_FINAL_CONF_OPTS += --disable-shared
else
HOST_GCC_FINAL_CONF_OPTS += --enable-shared
endif
ifeq ($(BR2_GCC_ENABLE_OPENMP),y)
HOST_GCC_FINAL_CONF_OPTS += --enable-libgomp
else
HOST_GCC_FINAL_CONF_OPTS += --disable-libgomp
endif
# End with user-provided options, so that they can override previously
# defined options.
HOST_GCC_FINAL_CONF_OPTS += \
$(call qstrip,$(BR2_EXTRA_GCC_CONFIG_OPTIONS))
HOST_GCC_FINAL_CONF_ENV = \
$(HOST_GCC_COMMON_CONF_ENV)
HOST_GCC_FINAL_MAKE_OPTS += $(HOST_GCC_COMMON_MAKE_OPTS)
# Make sure we have 'cc'
define HOST_GCC_FINAL_CREATE_CC_SYMLINKS
if [ ! -e $(HOST_DIR)/bin/$(GNU_TARGET_NAME)-cc ]; then \
ln -f $(HOST_DIR)/bin/$(GNU_TARGET_NAME)-gcc \
$(HOST_DIR)/bin/$(GNU_TARGET_NAME)-cc; \
fi
endef
HOST_GCC_FINAL_POST_INSTALL_HOOKS += HOST_GCC_FINAL_CREATE_CC_SYMLINKS
HOST_GCC_FINAL_TOOLCHAIN_WRAPPER_ARGS += $(HOST_GCC_COMMON_TOOLCHAIN_WRAPPER_ARGS)
HOST_GCC_FINAL_POST_BUILD_HOOKS += TOOLCHAIN_WRAPPER_BUILD
HOST_GCC_FINAL_POST_INSTALL_HOOKS += TOOLCHAIN_WRAPPER_INSTALL
# Note: this must be done after CREATE_CC_SYMLINKS, otherwise the
# -cc symlink to the wrapper is not created.
HOST_GCC_FINAL_POST_INSTALL_HOOKS += HOST_GCC_INSTALL_WRAPPER_AND_SIMPLE_SYMLINKS
# coldfire is not working without removing these object files from libgcc.a
ifeq ($(BR2_m68k_cf),y)
define HOST_GCC_FINAL_M68K_LIBGCC_FIXUP
find $(STAGING_DIR) -name libgcc.a -print | \
while read t; do $(GNU_TARGET_NAME)-ar dv "$t" _ctors.o; done
endef
HOST_GCC_FINAL_POST_INSTALL_HOOKS += HOST_GCC_FINAL_M68K_LIBGCC_FIXUP
endif
# Cannot use the HOST_GCC_FINAL_USR_LIBS mechanism below, because we want
# libgcc_s to be installed in /lib and not /usr/lib.
define HOST_GCC_FINAL_INSTALL_LIBGCC
-cp -dpf $(HOST_GCC_FINAL_GCC_LIB_DIR)/libgcc_s* \
$(STAGING_DIR)/lib/
-cp -dpf $(HOST_GCC_FINAL_GCC_LIB_DIR)/libgcc_s* \
$(TARGET_DIR)/lib/
endef
HOST_GCC_FINAL_POST_INSTALL_HOOKS += HOST_GCC_FINAL_INSTALL_LIBGCC
define HOST_GCC_FINAL_INSTALL_LIBATOMIC
-cp -dpf $(HOST_GCC_FINAL_GCC_LIB_DIR)/libatomic* \
$(STAGING_DIR)/lib/
-cp -dpf $(HOST_GCC_FINAL_GCC_LIB_DIR)/libatomic* \
$(TARGET_DIR)/lib/
endef
HOST_GCC_FINAL_POST_INSTALL_HOOKS += HOST_GCC_FINAL_INSTALL_LIBATOMIC
# Handle the installation of libraries in /usr/lib
HOST_GCC_FINAL_USR_LIBS =
ifeq ($(BR2_INSTALL_LIBSTDCPP),y)
HOST_GCC_FINAL_USR_LIBS += libstdc++
endif
ifeq ($(BR2_TOOLCHAIN_BUILDROOT_DLANG),y)
HOST_GCC_FINAL_USR_LIBS += libgdruntime libgphobos
endif
ifeq ($(BR2_TOOLCHAIN_BUILDROOT_FORTRAN),y)
HOST_GCC_FINAL_USR_LIBS += libgfortran
# fortran needs quadmath on x86 and x86_64
ifeq ($(BR2_TOOLCHAIN_HAS_LIBQUADMATH),y)
HOST_GCC_FINAL_USR_LIBS += libquadmath
endif
endif
ifeq ($(BR2_GCC_ENABLE_OPENMP),y)
HOST_GCC_FINAL_USR_LIBS += libgomp
endif
HOST_GCC_FINAL_USR_LIBS += $(call qstrip,$(BR2_TOOLCHAIN_EXTRA_LIBS))
ifneq ($(HOST_GCC_FINAL_USR_LIBS),)
define HOST_GCC_FINAL_INSTALL_STATIC_LIBS
for i in $(HOST_GCC_FINAL_USR_LIBS) ; do \
cp -dpf $(HOST_GCC_FINAL_GCC_LIB_DIR)/$${i}.a \
$(STAGING_DIR)/usr/lib/ ; \
done
endef
ifeq ($(BR2_STATIC_LIBS),)
define HOST_GCC_FINAL_INSTALL_SHARED_LIBS
for i in $(HOST_GCC_FINAL_USR_LIBS) ; do \
cp -dpf $(HOST_GCC_FINAL_GCC_LIB_DIR)/$${i}.so* \
$(STAGING_DIR)/usr/lib/ ; \
cp -dpf $(HOST_GCC_FINAL_GCC_LIB_DIR)/$${i}.so* \
$(TARGET_DIR)/usr/lib/ ; \
done
endef
endif
define HOST_GCC_FINAL_INSTALL_USR_LIBS
mkdir -p $(TARGET_DIR)/usr/lib
$(HOST_GCC_FINAL_INSTALL_STATIC_LIBS)
$(HOST_GCC_FINAL_INSTALL_SHARED_LIBS)
endef
HOST_GCC_FINAL_POST_INSTALL_HOOKS += HOST_GCC_FINAL_INSTALL_USR_LIBS
endif
$(eval $(host-autotools-package))
package/gcc/gcc-initial/gcc-initial.hash
Symlink
+1
View File
@@ -0,0 +1 @@
../gcc.hash
package/gcc/gcc-initial/gcc-initial.mk
+54
View File
@@ -0,0 +1,54 @@
################################################################################
#
# gcc-initial
#
################################################################################
GCC_INITIAL_VERSION = $(GCC_VERSION)
GCC_INITIAL_SITE = $(GCC_SITE)
GCC_INITIAL_SOURCE = $(GCC_SOURCE)
# We do not have a 'gcc' package per-se; we only have two incarnations,
# gcc-initial and gcc-final. gcc-initial is just am internal step that
# users should not care about, while gcc-final is the one they shall see.
HOST_GCC_INITIAL_DL_SUBDIR = gcc
HOST_GCC_INITIAL_DEPENDENCIES = $(HOST_GCC_COMMON_DEPENDENCIES)
HOST_GCC_INITIAL_EXCLUDES = $(HOST_GCC_EXCLUDES)
ifneq ($(ARCH_XTENSA_OVERLAY_FILE),)
HOST_GCC_INITIAL_POST_EXTRACT_HOOKS += HOST_GCC_XTENSA_OVERLAY_EXTRACT
HOST_GCC_INITIAL_EXTRA_DOWNLOADS += $(ARCH_XTENSA_OVERLAY_URL)
endif
HOST_GCC_INITIAL_POST_PATCH_HOOKS += HOST_GCC_APPLY_PATCHES
# gcc doesn't support in-tree build, so we create a 'build'
# subdirectory in the gcc sources, and build from there.
HOST_GCC_INITIAL_SUBDIR = build
HOST_GCC_INITIAL_PRE_CONFIGURE_HOOKS += HOST_GCC_CONFIGURE_SYMLINK
HOST_GCC_INITIAL_CONF_OPTS = \
$(HOST_GCC_COMMON_CONF_OPTS) \
--enable-languages=c \
--disable-shared \
--without-headers \
--disable-threads \
--with-newlib \
--disable-largefile \
$(call qstrip,$(BR2_EXTRA_GCC_CONFIG_OPTIONS))
HOST_GCC_INITIAL_CONF_ENV = \
$(HOST_GCC_COMMON_CONF_ENV)
HOST_GCC_INITIAL_MAKE_OPTS = $(HOST_GCC_COMMON_MAKE_OPTS) all-gcc all-target-libgcc
HOST_GCC_INITIAL_INSTALL_OPTS = install-gcc install-target-libgcc
HOST_GCC_INITIAL_TOOLCHAIN_WRAPPER_ARGS += $(HOST_GCC_COMMON_TOOLCHAIN_WRAPPER_ARGS)
HOST_GCC_INITIAL_POST_BUILD_HOOKS += TOOLCHAIN_WRAPPER_BUILD
HOST_GCC_INITIAL_POST_INSTALL_HOOKS += TOOLCHAIN_WRAPPER_INSTALL
HOST_GCC_INITIAL_POST_INSTALL_HOOKS += HOST_GCC_INSTALL_WRAPPER_AND_SIMPLE_SYMLINKS
$(eval $(host-autotools-package))
package/gcc/gcc.hash
+13
View File
@@ -0,0 +1,13 @@
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-8.4.0/sha512.sum
sha512 6de904f552a02de33b11ef52312bb664396efd7e1ce3bbe37bfad5ef617f133095b3767b4804bc7fe78df335cb53bc83f1ac055baed40979ce4c2c3e46b70280 gcc-8.4.0.tar.xz
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-9.4.0/sha512.sum
sha512 dfd3500bf21784b8351a522d53463cf362ede66b0bc302edf350bb44e94418497a8b4b797b6af8ca9b2eeb746b3b115d9c3698381b989546e9151b4496415624 gcc-9.4.0.tar.xz
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-10.3.0/sha512.sum
sha512 2b2dd7453d48a398c29eaebd1422b70341001b8c90a62aee51e83344e7fdd8a8e45f82a4a9165bd7edc76dada912c932f4b6632c5636760fec4c5d7e402b3f86 gcc-10.3.0.tar.xz
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-11.2.0/sha512.sum
sha512 d53a0a966230895c54f01aea38696f818817b505f1e2bfa65e508753fcd01b2aedb4a61434f41f3a2ddbbd9f41384b96153c684ded3f0fa97c82758d9de5c7cf gcc-11.2.0.tar.xz
# Locally calculated (fetched from Github)
sha512 b0853e2b1c5998044392023fa653e399e74118c46e616504ac59e1a2cf27620f94434767ce06b6cf4ca3dfb57f81d6eda92752befaf095ea5e564a9181b4659c gcc-arc-2020.09-release.tar.gz
# Locally calculated (fetched from Github)
sha512 2de7cf47333a4092b02d3bb98f4206f14966f1d139a724d09cf3b22f8a43ae0c704f33e6477d6367a03c29b265480dc900169e9d417006c5d46f0ae446b8c6f1 gcc-or1k-musl-5.4.0-20170218.tar.gz
package/gcc/gcc.mk
+333
View File
@@ -0,0 +1,333 @@
################################################################################
#
# Common variables for the gcc-initial and gcc-final packages.
#
################################################################################
#
# Version, site and source
#
GCC_VERSION = $(call qstrip,$(BR2_GCC_VERSION))
ifeq ($(BR2_GCC_VERSION_ARC),y)
GCC_SITE = $(call github,foss-for-synopsys-dwc-arc-processors,gcc,$(GCC_VERSION))
GCC_SOURCE = gcc-$(GCC_VERSION).tar.gz
else
GCC_SITE = $(BR2_GNU_MIRROR:/=)/gcc/gcc-$(GCC_VERSION)
GCC_SOURCE = gcc-$(GCC_VERSION).tar.xz
endif
#
# Xtensa special hook
#
define HOST_GCC_XTENSA_OVERLAY_EXTRACT
$(call arch-xtensa-overlay-extract,$(@D),gcc)
endef
#
# Apply patches
#
# gcc is a special package, not named gcc, but gcc-initial and
# gcc-final, but patches are nonetheless stored in package/gcc in the
# tree, and potentially in BR2_GLOBAL_PATCH_DIR directories as well.
define HOST_GCC_APPLY_PATCHES
for patchdir in \
package/gcc/$(GCC_VERSION) \
$(addsuffix /gcc/$(GCC_VERSION),$(call qstrip,$(BR2_GLOBAL_PATCH_DIR))) \
$(addsuffix /gcc,$(call qstrip,$(BR2_GLOBAL_PATCH_DIR))) ; do \
if test -d $${patchdir}; then \
$(APPLY_PATCHES) $(@D) $${patchdir} \*.patch || exit 1; \
fi; \
done
$(HOST_GCC_APPLY_POWERPC_PATCH)
endef
HOST_GCC_EXCLUDES = \
libjava/* libgo/*
#
# Create 'build' directory and configure symlink
#
define HOST_GCC_CONFIGURE_SYMLINK
mkdir -p $(@D)/build
ln -sf ../configure $(@D)/build/configure
endef
#
# Common configuration options
#
HOST_GCC_COMMON_DEPENDENCIES = \
host-binutils \
host-gmp \
host-mpc \
host-mpfr \
$(if $(BR2_BINFMT_FLAT),host-elf2flt)
HOST_GCC_COMMON_CONF_OPTS = \
--target=$(GNU_TARGET_NAME) \
--with-sysroot=$(STAGING_DIR) \
--enable-__cxa_atexit \
--with-gnu-ld \
--disable-libssp \
--disable-multilib \
--disable-decimal-float \
--with-gmp=$(HOST_DIR) \
--with-mpc=$(HOST_DIR) \
--with-mpfr=$(HOST_DIR) \
--with-pkgversion="Buildroot $(BR2_VERSION_FULL)" \
--with-bugurl="http://bugs.buildroot.net/" \
--without-zstd
# Don't build documentation. It takes up extra space / build time,
# and sometimes needs specific makeinfo versions to work
HOST_GCC_COMMON_CONF_ENV = \
MAKEINFO=missing
GCC_COMMON_TARGET_CFLAGS = $(TARGET_CFLAGS)
GCC_COMMON_TARGET_CXXFLAGS = $(TARGET_CXXFLAGS)
# used to fix ../../../../libsanitizer/libbacktrace/../../libbacktrace/elf.c:772:21: error: 'st.st_mode' may be used uninitialized in this function [-Werror=maybe-uninitialized]
ifeq ($(BR2_ENABLE_DEBUG),y)
GCC_COMMON_TARGET_CFLAGS += -Wno-error
endif
# Make sure libgcc & libstdc++ always get built with -matomic on ARC700
ifeq ($(GCC_TARGET_CPU):$(BR2_ARC_ATOMIC_EXT),arc700:y)
GCC_COMMON_TARGET_CFLAGS += -matomic
GCC_COMMON_TARGET_CXXFLAGS += -matomic
endif
# Propagate options used for target software building to GCC target libs
HOST_GCC_COMMON_CONF_ENV += CFLAGS_FOR_TARGET="$(GCC_COMMON_TARGET_CFLAGS)"
HOST_GCC_COMMON_CONF_ENV += CXXFLAGS_FOR_TARGET="$(GCC_COMMON_TARGET_CXXFLAGS)"
# libitm needs sparc V9+
ifeq ($(BR2_sparc_v8)$(BR2_sparc_leon3),y)
HOST_GCC_COMMON_CONF_OPTS += --disable-libitm
endif
# libmpx uses secure_getenv and struct _libc_fpstate not present in musl
ifeq ($(BR2_TOOLCHAIN_BUILDROOT_MUSL)$(BR2_TOOLCHAIN_GCC_AT_LEAST_6),yy)
HOST_GCC_COMMON_CONF_OPTS += --disable-libmpx
endif
# quadmath support requires wchar
ifeq ($(BR2_USE_WCHAR)$(BR2_TOOLCHAIN_HAS_LIBQUADMATH),yy)
HOST_GCC_COMMON_CONF_OPTS += --enable-libquadmath
else
HOST_GCC_COMMON_CONF_OPTS += --disable-libquadmath --disable-libquadmath-support
endif
# libsanitizer requires wordexp, not in default uClibc config. Also
# doesn't build properly with musl.
ifeq ($(BR2_TOOLCHAIN_BUILDROOT_UCLIBC)$(BR2_TOOLCHAIN_BUILDROOT_MUSL),y)
HOST_GCC_COMMON_CONF_OPTS += --disable-libsanitizer
endif
# libsanitizer is broken for SPARC
# https://bugs.busybox.net/show_bug.cgi?id=7951
ifeq ($(BR2_sparc)$(BR2_sparc64),y)
HOST_GCC_COMMON_CONF_OPTS += --disable-libsanitizer
endif
# The logic in libbacktrace/configure.ac to detect if __sync builtins
# are available assumes they are as soon as target_subdir is not
# empty, i.e when cross-compiling. However, some platforms do not have
# __sync builtins, so help the configure script a bit.
ifeq ($(BR2_TOOLCHAIN_HAS_SYNC_4),)
HOST_GCC_COMMON_CONF_ENV += target_configargs="libbacktrace_cv_sys_sync=no"
endif
# TLS support is not needed on uClibc/no-thread and
# uClibc/linux-threads, otherwise, for all other situations (glibc,
# musl and uClibc/NPTL), we need it.
ifeq ($(BR2_TOOLCHAIN_BUILDROOT_UCLIBC)$(BR2_PTHREADS)$(BR2_PTHREADS_NONE),yy)
HOST_GCC_COMMON_CONF_OPTS += --disable-tls
else
HOST_GCC_COMMON_CONF_OPTS += --enable-tls
endif
ifeq ($(BR2_GCC_ENABLE_LTO),y)
HOST_GCC_COMMON_CONF_OPTS += --enable-plugins --enable-lto
endif
ifeq ($(BR2_PTHREADS_NONE),y)
HOST_GCC_COMMON_CONF_OPTS += \
--disable-threads \
--disable-libitm \
--disable-libatomic
else
HOST_GCC_COMMON_CONF_OPTS += --enable-threads
endif
# gcc 5 doesn't need cloog any more, see
# https://gcc.gnu.org/gcc-5/changes.html and we don't support graphite
# on GCC 4.9.x, so only isl is needed.
ifeq ($(BR2_GCC_ENABLE_GRAPHITE),y)
HOST_GCC_COMMON_DEPENDENCIES += host-isl
HOST_GCC_COMMON_CONF_OPTS += --with-isl=$(HOST_DIR)
else
HOST_GCC_COMMON_CONF_OPTS += --without-isl --without-cloog
endif
ifeq ($(BR2_arc),y)
HOST_GCC_COMMON_DEPENDENCIES += host-flex host-bison
endif
ifeq ($(BR2_SOFT_FLOAT),y)
# only mips*-*-*, arm*-*-* and sparc*-*-* accept --with-float
# powerpc seems to be needing it as well
ifeq ($(BR2_arm)$(BR2_armeb)$(BR2_mips)$(BR2_mipsel)$(BR2_mips64)$(BR2_mips64el)$(BR2_powerpc)$(BR2_sparc),y)
HOST_GCC_COMMON_CONF_OPTS += --with-float=soft
endif
endif
# Determine arch/tune/abi/cpu options
ifneq ($(GCC_TARGET_ARCH),)
HOST_GCC_COMMON_CONF_OPTS += --with-arch="$(GCC_TARGET_ARCH)"
endif
ifneq ($(GCC_TARGET_ABI),)
HOST_GCC_COMMON_CONF_OPTS += --with-abi="$(GCC_TARGET_ABI)"
endif
ifeq ($(BR2_TOOLCHAIN_HAS_MNAN_OPTION),y)
ifneq ($(GCC_TARGET_NAN),)
HOST_GCC_COMMON_CONF_OPTS += --with-nan="$(GCC_TARGET_NAN)"
endif
endif
ifneq ($(GCC_TARGET_FP32_MODE),)
HOST_GCC_COMMON_CONF_OPTS += --with-fp-32="$(GCC_TARGET_FP32_MODE)"
endif
ifneq ($(GCC_TARGET_CPU),)
HOST_GCC_COMMON_CONF_OPTS += --with-cpu=$(GCC_TARGET_CPU)
endif
ifneq ($(GCC_TARGET_FPU),)
HOST_GCC_COMMON_CONF_OPTS += --with-fpu=$(GCC_TARGET_FPU)
endif
ifneq ($(GCC_TARGET_FLOAT_ABI),)
HOST_GCC_COMMON_CONF_OPTS += --with-float=$(GCC_TARGET_FLOAT_ABI)
endif
ifneq ($(GCC_TARGET_MODE),)
HOST_GCC_COMMON_CONF_OPTS += --with-mode=$(GCC_TARGET_MODE)
endif
# Enable proper double/long double for SPE ABI
ifeq ($(BR2_powerpc_SPE),y)
HOST_GCC_COMMON_CONF_OPTS += \
--enable-obsolete \
--enable-e500_double \
--with-long-double-128
endif
# Set default to Secure-PLT to prevent run-time
# generation of PLT stubs (supports RELRO and
# SELinux non-exemem capabilities)
ifeq ($(BR2_powerpc)$(BR2_powerpc64),y)
HOST_GCC_COMMON_CONF_OPTS += --enable-secureplt
endif
# PowerPC64 big endian by default uses the elfv1 ABI, and PowerPC 64
# little endian by default uses the elfv2 ABI. However, musl has
# decided to use the elfv2 ABI for both, so we force the elfv2 ABI for
# Power64 big endian when the selected C library is musl.
ifeq ($(BR2_TOOLCHAIN_USES_MUSL)$(BR2_powerpc64),yy)
HOST_GCC_COMMON_CONF_OPTS += \
--with-abi=elfv2 \
--without-long-double-128
endif
# Since glibc >= 2.26, poerpc64le requires double/long double which
# requires at least gcc 6.2.
# See sysdeps/powerpc/powerpc64le/configure.ac
ifeq ($(BR2_TOOLCHAIN_USES_GLIBC)$(BR2_TOOLCHAIN_GCC_AT_LEAST_6)$(BR2_powerpc64le),yyy)
HOST_GCC_COMMON_CONF_OPTS += \
--with-long-double-128
endif
ifeq ($(BR2_s390x),y)
HOST_GCC_COMMON_CONF_OPTS += \
--with-long-double-128
endif
HOST_GCC_COMMON_TOOLCHAIN_WRAPPER_ARGS += -DBR_CROSS_PATH_SUFFIX='".br_real"'
# For gcc-initial, we need to tell gcc that the C library will be
# providing the ssp support, as it can't guess it since the C library
# hasn't been built yet.
#
# For gcc-final, the gcc logic to detect whether SSP support is
# available or not in the C library is not working properly for
# uClibc, so let's be explicit as well.
HOST_GCC_COMMON_MAKE_OPTS = \
gcc_cv_libc_provides_ssp=$(if $(BR2_TOOLCHAIN_HAS_SSP),yes,no)
ifeq ($(BR2_CCACHE),y)
HOST_GCC_COMMON_CCACHE_HASH_FILES += $(GCC_DL_DIR)/$(GCC_SOURCE)
# Cfr. PATCH_BASE_DIRS in .stamp_patched, but we catch both versioned
# and unversioned patches unconditionally. Moreover, to facilitate the
# addition of gcc patches in BR2_GLOBAL_PATCH_DIR, we allow them to be
# stored in a sub-directory called 'gcc' even if it's not technically
# the name of the package.
HOST_GCC_COMMON_CCACHE_HASH_FILES += \
$(sort $(wildcard \
package/gcc/$(GCC_VERSION)/*.patch \
$(addsuffix /$($(PKG)_RAWNAME)/$(GCC_VERSION)/*.patch,$(call qstrip,$(BR2_GLOBAL_PATCH_DIR))) \
$(addsuffix /$($(PKG)_RAWNAME)/*.patch,$(call qstrip,$(BR2_GLOBAL_PATCH_DIR))) \
$(addsuffix /gcc/$(GCC_VERSION)/*.patch,$(call qstrip,$(BR2_GLOBAL_PATCH_DIR))) \
$(addsuffix /gcc/*.patch,$(call qstrip,$(BR2_GLOBAL_PATCH_DIR)))))
ifeq ($(BR2_xtensa),y)
HOST_GCC_COMMON_CCACHE_HASH_FILES += $(ARCH_XTENSA_OVERLAY_TAR)
endif
# _CONF_OPTS contains some references to the absolute path of $(HOST_DIR)
# and a reference to the Buildroot git revision (BR2_VERSION_FULL),
# so substitute those away.
HOST_GCC_COMMON_TOOLCHAIN_WRAPPER_ARGS += -DBR_CCACHE_HASH=\"`\
printf '%s\n' $(subst $(HOST_DIR),@HOST_DIR@,\
$(subst --with-pkgversion="Buildroot $(BR2_VERSION_FULL)",,$($(PKG)_CONF_OPTS))) \
| sha256sum - $(HOST_GCC_COMMON_CCACHE_HASH_FILES) \
| cut -c -64 | tr -d '\n'`\"
endif # BR2_CCACHE
# The LTO support in gcc creates wrappers for ar, ranlib and nm which load
# the lto plugin. These wrappers are called *-gcc-ar, *-gcc-ranlib, and
# *-gcc-nm and should be used instead of the real programs when -flto is
# used. However, we should not add the toolchain wrapper for them, and they
# match the *cc-* pattern. Therefore, an additional case is added for *-ar,
# *-ranlib and *-nm.
# According to gfortran manpage, it supports all options supported by gcc, so
# add gfortran to the list of the program called via the Buildroot wrapper.
# Avoid that a .br_real is symlinked a second time.
# Also create <arch>-linux-<tool> symlinks.
define HOST_GCC_INSTALL_WRAPPER_AND_SIMPLE_SYMLINKS
$(Q)cd $(HOST_DIR)/bin; \
for i in $(GNU_TARGET_NAME)-*; do \
case "$$i" in \
*.br_real) \
;; \
*-ar|*-ranlib|*-nm) \
ln -snf $$i $(ARCH)-linux$${i##$(GNU_TARGET_NAME)}; \
;; \
*cc|*cc-*|*++|*++-*|*cpp|*-gfortran|*-gdc) \
rm -f $$i.br_real; \
mv $$i $$i.br_real; \
ln -sf toolchain-wrapper $$i; \
ln -sf toolchain-wrapper $(ARCH)-linux$${i##$(GNU_TARGET_NAME)}; \
ln -snf $$i.br_real $(ARCH)-linux$${i##$(GNU_TARGET_NAME)}.br_real; \
;; \
*) \
ln -snf $$i $(ARCH)-linux$${i##$(GNU_TARGET_NAME)}; \
;; \
esac; \
done
endef
include $(sort $(wildcard package/gcc/*/*.mk))