francesco/fml13v01-buildroot
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

gcc: update to support gcc 11.3.0 and 12.2.0 from offical tag 2022.11.3

Browse Source 
Signed-off-by: Andy Hu <andy.hu@starfivetech.com>
This commit is contained in:
Andy Hu
2023-03-09 00:07:15 +08:00
parent 650e638627
commit 389dc57182
12 changed files with 774 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files
package/gcc/11.3.0/0001-or1k-Add-mcmodel-option-to-handle-large-GOTs.patch
+200
View File
@@ -0,0 +1,200 @@
From 7a20b4574f06472086c786bd1b078ee962cdb02c Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Tue, 6 Apr 2021 05:47:17 +0900
Subject: [PATCH] or1k: Add mcmodel option to handle large GOTs
When building libgeos we get an error with:
linux-uclibc/9.3.0/crtbeginS.o: in function `__do_global_dtors_aux':
crtstuff.c:(.text+0x118): relocation truncated to fit: R_OR1K_GOT16 against symbol `__cxa_finalize' defined in .text section in
/home/shorne/work/openrisc/3eb9f9d0f6d8274b2d19753c006bd83f7d536e3c/output/host/or1k-buildroot-linux-uclibc/sysroot/lib/libc.so.
This is caused by GOT code having a limit of 64k. In OpenRISC this
looks to be the only relocation code pattern to be limited to 64k.
This patch allows specifying a new option -mcmodel=large which can be
used to generate 2 more instructions to construct 32-bit addresses for
up to 4G GOTs.
gcc/ChangeLog:
PR target/99783
* config/or1k/or1k-opts.h: New file.
* config/or1k/or1k.c (or1k_legitimize_address_1, print_reloc):
Support generating gotha relocations if -mcmodel=large is
specified.
* config/or1k/or1k.h (TARGET_CMODEL_SMALL, TARGET_CMODEL_LARGE):
New macros.
* config/or1k/or1k.opt (mcmodel=): New option.
* doc/invoke.texi (OpenRISC Options): Document mcmodel.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
gcc/config/or1k/or1k-opts.h | 30 ++++++++++++++++++++++++++++++
gcc/config/or1k/or1k.c | 11 +++++++++--
gcc/config/or1k/or1k.h | 7 +++++++
gcc/config/or1k/or1k.opt | 19 +++++++++++++++++++
gcc/doc/invoke.texi | 12 +++++++++++-
5 files changed, 76 insertions(+), 3 deletions(-)
create mode 100644 gcc/config/or1k/or1k-opts.h
diff --git a/gcc/config/or1k/or1k-opts.h b/gcc/config/or1k/or1k-opts.h
new file mode 100644
index 00000000000..f791b894fdd
--- /dev/null
+++ b/gcc/config/or1k/or1k-opts.h
@@ -0,0 +1,30 @@
+/* Definitions for option handling for OpenRISC.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Stafford Horne.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_OR1K_OPTS_H
+#define GCC_OR1K_OPTS_H
+
+/* The OpenRISC code generation models available. */
+enum or1k_cmodel_type {
+ CMODEL_SMALL,
+ CMODEL_LARGE
+};
+
+#endif /* GCC_OR1K_OPTS_H */
diff --git a/gcc/config/or1k/or1k.c b/gcc/config/or1k/or1k.c
index e772a7addea..27d3fa17995 100644
--- a/gcc/config/or1k/or1k.c
+++ b/gcc/config/or1k/or1k.c
@@ -750,7 +750,14 @@ or1k_legitimize_address_1 (rtx x, rtx scratch)
{
base = gen_sym_unspec (base, UNSPEC_GOT);
crtl->uses_pic_offset_table = 1;
- t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
+ if (TARGET_CMODEL_LARGE)
+ {
+ emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, base)));
+ emit_insn (gen_add3_insn (t1, t1, pic_offset_table_rtx));
+ t2 = gen_rtx_LO_SUM (Pmode, t1, base);
+ }
+ else
+ t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
t2 = gen_const_mem (Pmode, t2);
emit_insn (gen_rtx_SET (t1, t2));
base = t1;
@@ -1089,7 +1096,7 @@ print_reloc (FILE *stream, rtx x, HOST_WIDE_INT add, reloc_kind kind)
no special markup. */
static const char * const relocs[RKIND_MAX][RTYPE_MAX] = {
{ "lo", "got", "gotofflo", "tpofflo", "gottpofflo", "tlsgdlo" },
- { "ha", NULL, "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
+ { "ha", "gotha", "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
};
reloc_type type = RTYPE_DIRECT;
diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
index fe01ab81ead..669907e7e74 100644
--- a/gcc/config/or1k/or1k.h
+++ b/gcc/config/or1k/or1k.h
@@ -21,6 +21,8 @@
#ifndef GCC_OR1K_H
#define GCC_OR1K_H
+#include "config/or1k/or1k-opts.h"
+
/* Names to predefine in the preprocessor for this target machine. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
@@ -37,6 +39,11 @@
} \
while (0)
+#define TARGET_CMODEL_SMALL \
+ (or1k_code_model == CMODEL_SMALL)
+#define TARGET_CMODEL_LARGE \
+ (or1k_code_model == CMODEL_LARGE)
+
/* Storage layout. */
#define DEFAULT_SIGNED_CHAR 1
diff --git a/gcc/config/or1k/or1k.opt b/gcc/config/or1k/or1k.opt
index 6bd0f3eee6d..cc23e3b8856 100644
--- a/gcc/config/or1k/or1k.opt
+++ b/gcc/config/or1k/or1k.opt
@@ -21,6 +21,9 @@
; See the GCC internals manual (options.texi) for a description of
; this file's format.
+HeaderInclude
+config/or1k/or1k-opts.h
+
mhard-div
Target RejectNegative InverseMask(SOFT_DIV)
Enable generation of hardware divide (l.div, l.divu) instructions. This is the
@@ -63,6 +66,22 @@ When -mhard-float is selected, enables generation of unordered floating point
compare and set flag (lf.sfun*) instructions. By default functions from libgcc
are used to perform unordered floating point compare and set flag operations.
+mcmodel=
+Target RejectNegative Joined Enum(or1k_cmodel_type) Var(or1k_code_model) Init(CMODEL_SMALL)
+Specify the code model used for accessing memory addresses. Specifying large
+enables generating binaries with large global offset tables. By default the
+value is small.
+
+Enum
+Name(or1k_cmodel_type) Type(enum or1k_cmodel_type)
+Known code model types (for use with the -mcmodel= option):
+
+EnumValue
+Enum(or1k_cmodel_type) String(small) Value(CMODEL_SMALL)
+
+EnumValue
+Enum(or1k_cmodel_type) String(large) Value(CMODEL_LARGE)
+
mcmov
Target RejectNegative Mask(CMOV)
Enable generation of conditional move (l.cmov) instructions. By default the
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 35508efb4ef..a1b7608a3aa 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1136,7 +1136,8 @@ Objective-C and Objective-C++ Dialects}.
@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol
-msoft-mul -msoft-div @gol
-msoft-float -mhard-float -mdouble-float -munordered-float @gol
--mcmov -mror -mrori -msext -msfimm -mshftimm}
+-mcmov -mror -mrori -msext -msfimm -mshftimm @gol
+-mcmodel=@var{code-model}}
@emph{PDP-11 Options}
@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
@@ -26443,6 +26444,15 @@ Enable generation of shift with immediate (@code{l.srai}, @code{l.srli},
@code{l.slli}) instructions. By default extra instructions will be generated
to store the immediate to a register first.
+@item -mcmodel=small
+@opindex mcmodel=small
+Generate OpenRISC code for the small model: The GOT is limited to 64k. This is
+the default model.
+
+@item -mcmodel=large
+@opindex mcmodel=large
+Generate OpenRISC code for the large model: The GOT may grow up to 4G in size.
+
@end table
--
2.35.1
package/gcc/11.3.0/0002-or1k-Use-cmodel-large-when-building-crtstuff.patch
+60
View File
@@ -0,0 +1,60 @@
From c544a63928406b706b8493fd9b8ca2136b433cf0 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Wed, 21 Apr 2021 05:33:15 +0900
Subject: [PATCH] or1k: Use cmodel=large when building crtstuff
When linking gcc runtime objects into large binaries the link may fail
with the below errors. This will happen even if we are building with
-mcmodel=large.
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `deregister_tm_clones':
crtstuff.c:(.text+0x3c): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_deregisterTMCloneTable'
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `register_tm_clones':
crtstuff.c:(.text+0xc0): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_registerTMCloneTable'
This patch builds the gcc crtstuff binaries always with the
-mcmodel=large option to ensure they can be linked into large binaries.
libgcc/ChangeLog:
PR target/99783
* config.host (or1k-*, tmake_file): Add or1k/t-crtstuff.
* config/or1k/t-crtstuff: New file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
libgcc/config.host | 4 ++--
libgcc/config/or1k/t-crtstuff | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
create mode 100644 libgcc/config/or1k/t-crtstuff
diff --git a/libgcc/config.host b/libgcc/config.host
index f2dc7e266f4..6f193c32fbd 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1132,12 +1132,12 @@ nios2-*-*)
extra_parts="$extra_parts crti.o crtn.o"
;;
or1k-*-linux*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
md_unwind_header=or1k/linux-unwind.h
;;
or1k-*-*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
;;
pdp11-*-*)
diff --git a/libgcc/config/or1k/t-crtstuff b/libgcc/config/or1k/t-crtstuff
new file mode 100644
index 00000000000..dcae7f3498e
--- /dev/null
+++ b/libgcc/config/or1k/t-crtstuff
@@ -0,0 +1,2 @@
+# Compile crtbeginS.o and crtendS.o with -mcmodel=large
+CRTSTUFF_T_CFLAGS_S += -mcmodel=large
--
2.35.1
package/gcc/11.3.0/0003-gcc-define-_REENTRANT-for-OpenRISC-when-pthread-is-p.patch
+31
View File
@@ -0,0 +1,31 @@
From 8ef5787701f4d7cf46a27771d38ab54af2499e25 Mon Sep 17 00:00:00 2001
From: Bernd Kuhls <bernd.kuhls@t-online.de>
Date: Fri, 27 Mar 2020 21:23:53 +0100
Subject: [PATCH] gcc: define _REENTRANT for OpenRISC when -pthread is passed
The detection of pthread support fails on OpenRISC unless _REENTRANT
is defined. Added the CPP_SPEC definition to correct this.
Patch sent upstream: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94372
Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
---
gcc/config/or1k/linux.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/or1k/linux.h b/gcc/config/or1k/linux.h
index 196f3f3c8f0..0cbdc934af1 100644
--- a/gcc/config/or1k/linux.h
+++ b/gcc/config/or1k/linux.h
@@ -32,6 +32,8 @@
#undef MUSL_DYNAMIC_LINKER
#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-or1k.so.1"
+#define CPP_SPEC "%{pthread:-D_REENTRANT}"
+
#undef LINK_SPEC
#define LINK_SPEC "%{h*} \
%{static:-Bstatic} \
--
2.35.1
package/gcc/11.3.0/0004-disable-split-stack-for-non-thread-builds.patch
+26
View File
@@ -0,0 +1,26 @@
From 3b9d7d397fa6dc290eb05bffca80968efb6ec2e5 Mon Sep 17 00:00:00 2001
From: Waldemar Brodkorb <wbx@openadk.org>
Date: Mon, 25 Jul 2022 00:29:55 +0200
Subject: [PATCH] disable split-stack for non-thread builds
Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
[Romain: convert to git format]
Signed-off-by: Romain Naour <romain.naour@smile.fr>
---
libgcc/config/t-stack | 2 ++
1 file changed, 2 insertions(+)
diff --git a/libgcc/config/t-stack b/libgcc/config/t-stack
index cc0366b4cd8..f3f97e86d60 100644
--- a/libgcc/config/t-stack
+++ b/libgcc/config/t-stack
@@ -1,4 +1,6 @@
# Makefile fragment to provide generic support for -fsplit-stack.
# This should be used in config.host for any host which supports
# -fsplit-stack.
+ifeq ($(enable_threads),yes)
LIB2ADD_ST += $(srcdir)/generic-morestack.c $(srcdir)/generic-morestack-thread.c
+endif
--
2.34.3
package/gcc/11.3.0/0005-rs6000-Improve-.machine.patch
+120
View File
@@ -0,0 +1,120 @@
From ca2c3a7d3db7a699c358d3408f820396dd536fc8 Mon Sep 17 00:00:00 2001
From: Segher Boessenkool <segher@kernel.crashing.org>
Date: Tue, 1 Mar 2022 17:04:29 +0000
Subject: [PATCH] rs6000: Improve .machine
This adds more correct .machine for most older CPUs. It should be
conservative in the sense that everything we handled before we handle at
least as well now. This does not yet revamp the server CPU handling, it
is too risky at this point in time.
Tested on powerpc64-linux {-m32,-m64}. Also manually tested with all
-mcpu=, and the output of that passed through the GNU assembler.
2022-03-04 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.c (rs6000_machine_from_flags): Restructure a
bit. Handle most older CPUs.
(cherry picked from commit 77eccbf39ed55297802bb66dff5f62507a7239e3)
(cherry picked from commit fc7e603edc67c66a14f893f3b5a0a34e7d26f77c)
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
gcc/config/rs6000/rs6000.c | 81 +++++++++++++++++++++++++-------------
1 file changed, 54 insertions(+), 27 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 0421dc7adb3..0a55c979c36 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5742,33 +5742,60 @@ const char *rs6000_machine;
const char *
rs6000_machine_from_flags (void)
{
- /* For some CPUs, the machine cannot be determined by ISA flags. We have to
- check them first. */
- switch (rs6000_cpu)
- {
- case PROCESSOR_PPC8540:
- case PROCESSOR_PPC8548:
- return "e500";
-
- case PROCESSOR_PPCE300C2:
- case PROCESSOR_PPCE300C3:
- return "e300";
-
- case PROCESSOR_PPCE500MC:
- return "e500mc";
-
- case PROCESSOR_PPCE500MC64:
- return "e500mc64";
-
- case PROCESSOR_PPCE5500:
- return "e5500";
-
- case PROCESSOR_PPCE6500:
- return "e6500";
-
- default:
- break;
- }
+ /* e300 and e500 */
+ if (rs6000_cpu == PROCESSOR_PPCE300C2 || rs6000_cpu == PROCESSOR_PPCE300C3)
+ return "e300";
+ if (rs6000_cpu == PROCESSOR_PPC8540 || rs6000_cpu == PROCESSOR_PPC8548)
+ return "e500";
+ if (rs6000_cpu == PROCESSOR_PPCE500MC)
+ return "e500mc";
+ if (rs6000_cpu == PROCESSOR_PPCE500MC64)
+ return "e500mc64";
+ if (rs6000_cpu == PROCESSOR_PPCE5500)
+ return "e5500";
+ if (rs6000_cpu == PROCESSOR_PPCE6500)
+ return "e6500";
+
+ /* 400 series */
+ if (rs6000_cpu == PROCESSOR_PPC403)
+ return "\"403\"";
+ if (rs6000_cpu == PROCESSOR_PPC405)
+ return "\"405\"";
+ if (rs6000_cpu == PROCESSOR_PPC440)
+ return "\"440\"";
+ if (rs6000_cpu == PROCESSOR_PPC476)
+ return "\"476\"";
+
+ /* A2 */
+ if (rs6000_cpu == PROCESSOR_PPCA2)
+ return "a2";
+
+ /* Cell BE */
+ if (rs6000_cpu == PROCESSOR_CELL)
+ return "cell";
+
+ /* Titan */
+ if (rs6000_cpu == PROCESSOR_TITAN)
+ return "titan";
+
+ /* 500 series and 800 series */
+ if (rs6000_cpu == PROCESSOR_MPCCORE)
+ return "\"821\"";
+
+ /* 600 series and 700 series, "classic" */
+ if (rs6000_cpu == PROCESSOR_PPC601 || rs6000_cpu == PROCESSOR_PPC603
+ || rs6000_cpu == PROCESSOR_PPC604 || rs6000_cpu == PROCESSOR_PPC604e
+ || rs6000_cpu == PROCESSOR_PPC750 || rs6000_cpu == PROCESSOR_POWERPC)
+ return "ppc";
+
+ /* Classic with AltiVec, "G4" */
+ if (rs6000_cpu == PROCESSOR_PPC7400 || rs6000_cpu == PROCESSOR_PPC7450)
+ return "\"7450\"";
+
+ /* The older 64-bit CPUs */
+ if (rs6000_cpu == PROCESSOR_PPC620 || rs6000_cpu == PROCESSOR_PPC630
+ || rs6000_cpu == PROCESSOR_RS64A || rs6000_cpu == PROCESSOR_POWERPC64)
+ return "ppc64";
HOST_WIDE_INT flags = rs6000_isa_flags;
--
2.34.3
package/gcc/11.3.0/0006-rs6000-Do-not-use-rs6000_cpu-for-.machine-ppc-and-pp.patch
+68
View File
@@ -0,0 +1,68 @@
From 6de33ed642f119f1e2543095dd56e4a94f97c27f Mon Sep 17 00:00:00 2001
From: Segher Boessenkool <segher@kernel.crashing.org>
Date: Fri, 11 Mar 2022 21:15:18 +0000
Subject: [PATCH] rs6000: Do not use rs6000_cpu for .machine ppc and ppc64
(PR104829)
Fixes: 77eccbf39ed5
rs6000.h has
#define PROCESSOR_POWERPC PROCESSOR_PPC604
#define PROCESSOR_POWERPC64 PROCESSOR_RS64A
which means that if you use things like -mcpu=powerpc -mvsx it will no
longer work after my latest .machine patch. This causes GCC build errors
in some cases, not a good idea (even if the errors are actually
pre-existing: using -mvsx with a machine that does not have VSX cannot
work properly).
2022-03-11 Segher Boessenkool <segher@kernel.crashing.org>
PR target/104829
* config/rs6000/rs6000.c (rs6000_machine_from_flags): Don't output
"ppc" and "ppc64" based on rs6000_cpu.
(cherry picked from commit 80fcc4b6afee72443bef551064826b3b4b6785e6)
(cherry picked from commit d87e0e297b1cba73a0c055d2a3e9267d288f435a)
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
gcc/config/rs6000/rs6000.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 0a55c979c36..7e5cdd34840 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5782,20 +5782,28 @@ rs6000_machine_from_flags (void)
if (rs6000_cpu == PROCESSOR_MPCCORE)
return "\"821\"";
+#if 0
+ /* This (and ppc64 below) are disabled here (for now at least) because
+ PROCESSOR_POWERPC, PROCESSOR_POWERPC64, and PROCESSOR_COMMON
+ are #define'd as some of these. Untangling that is a job for later. */
+
/* 600 series and 700 series, "classic" */
if (rs6000_cpu == PROCESSOR_PPC601 || rs6000_cpu == PROCESSOR_PPC603
|| rs6000_cpu == PROCESSOR_PPC604 || rs6000_cpu == PROCESSOR_PPC604e
- || rs6000_cpu == PROCESSOR_PPC750 || rs6000_cpu == PROCESSOR_POWERPC)
+ || rs6000_cpu == PROCESSOR_PPC750)
return "ppc";
+#endif
/* Classic with AltiVec, "G4" */
if (rs6000_cpu == PROCESSOR_PPC7400 || rs6000_cpu == PROCESSOR_PPC7450)
return "\"7450\"";
+#if 0
/* The older 64-bit CPUs */
if (rs6000_cpu == PROCESSOR_PPC620 || rs6000_cpu == PROCESSOR_PPC630
- || rs6000_cpu == PROCESSOR_RS64A || rs6000_cpu == PROCESSOR_POWERPC64)
+ || rs6000_cpu == PROCESSOR_RS64A)
return "ppc64";
+#endif
HOST_WIDE_INT flags = rs6000_isa_flags;
--
2.34.3
package/gcc/11.3.0/0007-fixinc-don-t-fix-machine-names-in-__has_include-.-PR.patch
+124
View File
@@ -0,0 +1,124 @@
From de3f4ee9a5bd2adcb5ff2e1690db2567fda1473c Mon Sep 17 00:00:00 2001
From: Xi Ruoyao <xry111@mengyan1223.wang>
Date: Mon, 28 Jun 2021 13:54:58 +0800
Subject: [PATCH] fixinc: don't "fix" machine names in __has_include(...)
[PR91085]
fixincludes/
PR other/91085
* fixfixes.c (check_has_inc): New static function.
(machine_name_fix): Don't replace header names in
__has_include(...).
* inclhack.def (machine_name): Adjust test.
* tests/base/testing.h: Update.
Upstream: 6bf383c37e6131a8e247e8a0997d55d65c830b6d
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
---
fixincludes/fixfixes.c | 45 ++++++++++++++++++++++++++++++--
fixincludes/inclhack.def | 3 ++-
fixincludes/tests/base/testing.h | 2 +-
3 files changed, 46 insertions(+), 4 deletions(-)
diff --git a/fixincludes/fixfixes.c b/fixincludes/fixfixes.c
index 5b23a8b640d..404b420f302 100644
--- a/fixincludes/fixfixes.c
+++ b/fixincludes/fixfixes.c
@@ -477,6 +477,39 @@ FIX_PROC_HEAD( char_macro_def_fix )
fputs (text, stdout);
}
+/* Check if the pattern at pos is actually in a "__has_include(...)"
+ directive. Return the pointer to the ')' of this
+ "__has_include(...)" if it is, NULL otherwise. */
+static const char *
+check_has_inc (const char *begin, const char *pos, const char *end)
+{
+ static const char has_inc[] = "__has_include";
+ const size_t has_inc_len = sizeof (has_inc) - 1;
+ const char *p;
+
+ for (p = memmem (begin, pos - begin, has_inc, has_inc_len);
+ p != NULL;
+ p = memmem (p, pos - p, has_inc, has_inc_len))
+ {
+ p += has_inc_len;
+ while (p < end && ISSPACE (*p))
+ p++;
+
+ /* "__has_include" may appear as "defined(__has_include)",
+ search for the next appearance then. */
+ if (*p != '(')
+ continue;
+
+ /* To avoid too much complexity, just hope there is never a
+ ')' in a header name. */
+ p = memchr (p, ')', end - p);
+ if (p == NULL || p > pos)
+ return p;
+ }
+
+ return NULL;
+}
+
/* Fix for machine name #ifdefs that are not in the namespace reserved
by the C standard. They won't be defined if compiling with -ansi,
and the headers will break. We go to some trouble to only change
@@ -524,7 +557,7 @@ FIX_PROC_HEAD( machine_name_fix )
/* If the 'name_pat' matches in between base and limit, we have
a bogon. It is not worth the hassle of excluding comments
because comments on #if/#ifdef lines are rare, and strings on
- such lines are illegal.
+ such lines are only legal in a "__has_include" directive.
REG_NOTBOL means 'base' is not at the beginning of a line, which
shouldn't matter since the name_re has no ^ anchor, but let's
@@ -544,8 +577,16 @@ FIX_PROC_HEAD( machine_name_fix )
break;
p = base + match[0].rm_so;
- base += match[0].rm_eo;
+ /* Check if the match is in __has_include(...) (PR 91085). */
+ q = check_has_inc (base, p, limit);
+ if (q)
+ {
+ base = q + 1;
+ goto again;
+ }
+
+ base += match[0].rm_eo;
/* One more test: if on the same line we have the same string
with the appropriate underscores, then leave it alone.
We want exactly two leading and trailing underscores. */
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index 066bef99162..b7ad6982e96 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -3154,7 +3154,8 @@ fix = {
c_fix = machine_name;
test_text = "/* MACH_DIFF: */\n"
- "#if defined( i386 ) || defined( sparc ) || defined( vax )"
+ "#if defined( i386 ) || defined( sparc ) || defined( vax ) || "
+ "defined( linux ) || __has_include ( <linux.h> )"
"\n/* no uniform test, so be careful :-) */";
};
diff --git a/fixincludes/tests/base/testing.h b/fixincludes/tests/base/testing.h
index cf95321fb86..8b3accaf04e 100644
--- a/fixincludes/tests/base/testing.h
+++ b/fixincludes/tests/base/testing.h
@@ -64,7 +64,7 @@ BSD43__IOWR('T', 1) /* Some are multi-line */
#if defined( MACHINE_NAME_CHECK )
/* MACH_DIFF: */
-#if defined( i386 ) || defined( sparc ) || defined( vax )
+#if defined( i386 ) || defined( sparc ) || defined( vax ) || defined( linux ) || __has_include ( <linux.h> )
/* no uniform test, so be careful :-) */
#endif /* MACHINE_NAME_CHECK */
--
2.37.3
package/gcc/12.2.0/0001-disable-split-stack-for-non-thread-builds.patch
+26
View File
@@ -0,0 +1,26 @@
From 4f67134e0b1404fef4ea72342be8fab4c37ca8c8 Mon Sep 17 00:00:00 2001
From: Waldemar Brodkorb <wbx@openadk.org>
Date: Mon, 25 Jul 2022 00:29:55 +0200
Subject: [PATCH] disable split-stack for non-thread builds
Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
[Romain: convert to git format]
Signed-off-by: Romain Naour <romain.naour@smile.fr>
---
libgcc/config/t-stack | 2 ++
1 file changed, 2 insertions(+)
diff --git a/libgcc/config/t-stack b/libgcc/config/t-stack
index cc0366b4cd8..f3f97e86d60 100644
--- a/libgcc/config/t-stack
+++ b/libgcc/config/t-stack
@@ -1,4 +1,6 @@
# Makefile fragment to provide generic support for -fsplit-stack.
# This should be used in config.host for any host which supports
# -fsplit-stack.
+ifeq ($(enable_threads),yes)
LIB2ADD_ST += $(srcdir)/generic-morestack.c $(srcdir)/generic-morestack-thread.c
+endif
--
2.34.3
package/gcc/12.2.0/0002-fix-condvar.patch
+82
View File
@@ -0,0 +1,82 @@
From ee4af2ed0b7322884ec4ff537564683c3749b813 Mon Sep 17 00:00:00 2001
From: Jonathan Wakely <jwakely@redhat.com>
Date: Thu, 22 Dec 2022 09:56:47 +0000
Subject: [PATCH] libstdc++: Avoid recursion in __nothrow_wait_cv::wait
[PR105730]
The commit r12-5877-g9e18a25331fa25 removed the incorrect
noexcept-specifier from std::condition_variable::wait and gave the new
symbol version @@GLIBCXX_3.4.30. It also redefined the original symbol
std::condition_variable::wait(unique_lock<mutex>&)@GLIBCXX_3.4.11 as an
alias for a new symbol, __gnu_cxx::__nothrow_wait_cv::wait, which still
has the incorrect noexcept guarantee. That __nothrow_wait_cv::wait is
just a wrapper around the real condition_variable::wait which adds
noexcept and so terminates on a __forced_unwind exception.
This doesn't work on uclibc, possibly due to a dynamic linker bug. When
__nothrow_wait_cv::wait calls the condition_variable::wait function it
binds to the alias symbol, which means it just calls itself recursively
until the stack overflows.
This change avoids the possibility of a recursive call by changing the
__nothrow_wait_cv::wait function so that instead of calling
condition_variable::wait it re-implements it. This requires accessing
the private _M_cond member of condition_variable, so we need to use the
trick of instantiating a template with the member-pointer of the private
member.
libstdc++-v3/ChangeLog:
PR libstdc++/105730
* src/c++11/compatibility-condvar.cc (__nothrow_wait_cv::wait):
Access private data member of base class and call its wait
member.
Signed-off-by: Gleb Mazovetskiy <glex.spb@gmail.com>
---
.../src/c++11/compatibility-condvar.cc | 22 ++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/libstdc++-v3/src/c++11/compatibility-condvar.cc b/libstdc++-v3/src/c++11/compatibility-condvar.cc
index e3a8b8403ca..3cef3bc0714 100644
--- a/libstdc++-v3/src/c++11/compatibility-condvar.cc
+++ b/libstdc++-v3/src/c++11/compatibility-condvar.cc
@@ -67,6 +67,24 @@ _GLIBCXX_END_NAMESPACE_VERSION
&& defined(_GLIBCXX_HAVE_SYMVER_SYMBOL_RENAMING_RUNTIME_SUPPORT)
namespace __gnu_cxx _GLIBCXX_VISIBILITY(default)
{
+namespace
+{
+ // Pointer-to-member for private std::condition_variable::_M_cond member.
+ std::__condvar std::condition_variable::* __base_member;
+
+ template<std::__condvar std::condition_variable::*X>
+ struct cracker
+ { static std::__condvar std::condition_variable::* value; };
+
+ // Initializer for this static member also initializes __base_member.
+ template<std::__condvar std::condition_variable::*X>
+ std::__condvar std::condition_variable::*
+ cracker<X>::value = __base_member = X;
+
+ // Explicit instantiation is allowed to access the private member.
+ template class cracker<&std::condition_variable::_M_cond>;
+}
+
struct __nothrow_wait_cv : std::condition_variable
{
void wait(std::unique_lock<std::mutex>&) noexcept;
@@ -76,7 +94,9 @@ __attribute__((used))
void
__nothrow_wait_cv::wait(std::unique_lock<std::mutex>& lock) noexcept
{
- this->condition_variable::wait(lock);
+ // In theory this could be simply this->std::condition_variable::wait(lock)
+ // but with uclibc that binds to the @GLIBCXX_3.4.11 symbol, see PR 105730.
+ (this->*__base_member).wait(*lock.mutex());
}
} // namespace __gnu_cxx
--
2.31.1
package/gcc/Config.in.host
+28 -9
View File
@@ -2,9 +2,10 @@ comment "GCC Options"
choice choice
prompt "GCC compiler Version" prompt "GCC compiler Version"
default BR2_GCC_VERSION_ARC if BR2_GCC_VERSION_4_8_ARC # legacy
default BR2_GCC_VERSION_ARC if BR2_arc default BR2_GCC_VERSION_ARC if BR2_arc
default BR2_GCC_VERSION_POWERPC_SPE if BR2_powerpc_SPE default BR2_GCC_VERSION_POWERPC_SPE if BR2_powerpc_SPE
default BR2_GCC_VERSION_10_X default BR2_GCC_VERSION_11_X
help help
Select the version of gcc you wish to use. Select the version of gcc you wish to use.
@@ -12,7 +13,7 @@ config BR2_GCC_VERSION_ARC
bool "gcc arc (10.x)" bool "gcc arc (10.x)"
# Only supported architecture # Only supported architecture
depends on BR2_arc depends on BR2_arc
select BR2_TOOLCHAIN_GCC_AT_LEAST_9 select BR2_TOOLCHAIN_GCC_AT_LEAST_10
config BR2_GCC_VERSION_POWERPC_SPE config BR2_GCC_VERSION_POWERPC_SPE
bool "gcc powerpc spe" bool "gcc powerpc spe"
@@ -39,14 +40,13 @@ config BR2_GCC_VERSION_10_X
# powerpc spe support has been deprecated since gcc 8.x. # powerpc spe support has been deprecated since gcc 8.x.
# https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html # https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
depends on !BR2_powerpc_SPE depends on !BR2_powerpc_SPE
# C-SKY sk610 needs abiv1, which is not supported in # ARC HS48 rel 31 only supported by gcc arc fork.
# upstream gcc. C-SKY gcc upstream support not tested depends on !BR2_archs4x_rel31
# with upstream binutils and glibc.
depends on !BR2_csky
select BR2_TOOLCHAIN_GCC_AT_LEAST_10 select BR2_TOOLCHAIN_GCC_AT_LEAST_10
config BR2_GCC_VERSION_11_X config BR2_GCC_VERSION_11_X
bool "gcc 11.x" bool "gcc 11.x"
depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_12
# powerpc spe support has been deprecated since gcc 8.x. # powerpc spe support has been deprecated since gcc 8.x.
# https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html # https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
depends on !BR2_powerpc_SPE depends on !BR2_powerpc_SPE
@@ -54,8 +54,23 @@ config BR2_GCC_VERSION_11_X
# that need to be reverted since gcc 8.4, 9.3 and 10.1. # that need to be reverted since gcc 8.4, 9.3 and 10.1.
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784 # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
depends on !BR2_sparc depends on !BR2_sparc
# ARC HS48 rel 31 only supported by gcc arc fork.
depends on !BR2_archs4x_rel31
select BR2_TOOLCHAIN_GCC_AT_LEAST_11 select BR2_TOOLCHAIN_GCC_AT_LEAST_11
config BR2_GCC_VERSION_12_X
bool "gcc 12.x"
# powerpc spe support has been deprecated since gcc 8.x.
# https://gcc.gnu.org/ml/gcc/2018-04/msg00102.html
depends on !BR2_powerpc_SPE
# uClibc-ng broken on sparc due to recent gcc changes
# that need to be reverted since gcc 8.4, 9.3 and 10.1.
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98784
depends on !BR2_sparc
# ARC HS48 rel 31 only supported by gcc arc fork.
depends on !BR2_archs4x_rel31
select BR2_TOOLCHAIN_GCC_AT_LEAST_12
endchoice endchoice
# libcilkrts was introduced in gcc 4.9 and removed in gcc 8.x # libcilkrts was introduced in gcc 4.9 and removed in gcc 8.x
@@ -75,13 +90,17 @@ config BR2_GCC_SUPPORTS_DLANG
default y if BR2_riscv && !BR2_RISCV_64 default y if BR2_riscv && !BR2_RISCV_64
depends on BR2_TOOLCHAIN_GCC_AT_LEAST_9 depends on BR2_TOOLCHAIN_GCC_AT_LEAST_9
depends on BR2_TOOLCHAIN_USES_GLIBC depends on BR2_TOOLCHAIN_USES_GLIBC
# "The D front-end is now itself written in D, in order to build GDC, you
# will need a working GDC compiler (GCC version 9.1 or later)."
# https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=5fee5ec362f7a243f459e6378fd49dfc89dc9fb5
depends on !BR2_TOOLCHAIN_GCC_AT_LEAST_12
config BR2_GCC_VERSION config BR2_GCC_VERSION
string string
default "8.4.0" if BR2_GCC_VERSION_POWERPC_SPE default "8.4.0" if BR2_GCC_VERSION_POWERPC_SPE
default "9.4.0" if BR2_GCC_VERSION_9_X default "10.4.0" if BR2_GCC_VERSION_10_X
default "10.3.0" if BR2_GCC_VERSION_10_X default "11.3.0" if BR2_GCC_VERSION_11_X
default "11.2.0" if BR2_GCC_VERSION_11_X default "12.2.0" if BR2_GCC_VERSION_12_X
default "arc-2020.09-release" if BR2_GCC_VERSION_ARC default "arc-2020.09-release" if BR2_GCC_VERSION_ARC
config BR2_EXTRA_GCC_CONFIG_OPTIONS config BR2_EXTRA_GCC_CONFIG_OPTIONS
package/gcc/gcc.hash
+7 -7
View File
@@ -1,11 +1,11 @@
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-8.4.0/sha512.sum # From https://gcc.gnu.org/pub/gcc/releases/gcc-8.4.0/sha512.sum
sha512 6de904f552a02de33b11ef52312bb664396efd7e1ce3bbe37bfad5ef617f133095b3767b4804bc7fe78df335cb53bc83f1ac055baed40979ce4c2c3e46b70280 gcc-8.4.0.tar.xz sha512 6de904f552a02de33b11ef52312bb664396efd7e1ce3bbe37bfad5ef617f133095b3767b4804bc7fe78df335cb53bc83f1ac055baed40979ce4c2c3e46b70280 gcc-8.4.0.tar.xz
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-9.4.0/sha512.sum # From https://gcc.gnu.org/pub/gcc/releases/gcc-10.4.0/sha512.sum
sha512 dfd3500bf21784b8351a522d53463cf362ede66b0bc302edf350bb44e94418497a8b4b797b6af8ca9b2eeb746b3b115d9c3698381b989546e9151b4496415624 gcc-9.4.0.tar.xz sha512 440c08ca746da450d9a1b35e8fd2305cb27e7e6987cd9d0f7d375f3b1fc9e4b0bd7acb3cd7bf795e72fcbead59cdef5b6c152862f5d35cd9fbfe6902101ce648 gcc-10.4.0.tar.xz
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-10.3.0/sha512.sum # From https://gcc.gnu.org/pub/gcc/releases/gcc-11.3.0/sha512.sum
sha512 2b2dd7453d48a398c29eaebd1422b70341001b8c90a62aee51e83344e7fdd8a8e45f82a4a9165bd7edc76dada912c932f4b6632c5636760fec4c5d7e402b3f86 gcc-10.3.0.tar.xz sha512 f0be5ad705c73b84477128a69c047f57dd47002f375eb60e1e842e08cf2009a509e92152bca345823926d550b7395ae6d4de7db51d1ee371c2dc37313881fca7 gcc-11.3.0.tar.xz
# From ftp://gcc.gnu.org/pub/gcc/releases/gcc-11.2.0/sha512.sum # From https://gcc.gnu.org/pub/gcc/releases/gcc-12.2.0/sha512.sum
sha512 d53a0a966230895c54f01aea38696f818817b505f1e2bfa65e508753fcd01b2aedb4a61434f41f3a2ddbbd9f41384b96153c684ded3f0fa97c82758d9de5c7cf gcc-11.2.0.tar.xz sha512 e9e857bd81bf7a370307d6848c81b2f5403db8c7b5207f54bce3f3faac3bde63445684092c2bc1a2427cddb6f7746496d9fbbef05fbbd77f2810b2998f1f9173 gcc-12.2.0.tar.xz
# Locally calculated (fetched from Github) # Locally calculated (fetched from Github)
sha512 b0853e2b1c5998044392023fa653e399e74118c46e616504ac59e1a2cf27620f94434767ce06b6cf4ca3dfb57f81d6eda92752befaf095ea5e564a9181b4659c gcc-arc-2020.09-release.tar.gz sha512 b0853e2b1c5998044392023fa653e399e74118c46e616504ac59e1a2cf27620f94434767ce06b6cf4ca3dfb57f81d6eda92752befaf095ea5e564a9181b4659c gcc-arc-2020.09-release.tar.gz
package/gcc/gcc.mk
+2 -1
View File
@@ -104,6 +104,7 @@ endif
# Propagate options used for target software building to GCC target libs # Propagate options used for target software building to GCC target libs
HOST_GCC_COMMON_CONF_ENV += CFLAGS_FOR_TARGET="$(GCC_COMMON_TARGET_CFLAGS)" HOST_GCC_COMMON_CONF_ENV += CFLAGS_FOR_TARGET="$(GCC_COMMON_TARGET_CFLAGS)"
HOST_GCC_COMMON_CONF_ENV += CXXFLAGS_FOR_TARGET="$(GCC_COMMON_TARGET_CXXFLAGS)" HOST_GCC_COMMON_CONF_ENV += CXXFLAGS_FOR_TARGET="$(GCC_COMMON_TARGET_CXXFLAGS)"
HOST_GCC_COMMON_CONF_ENV += AR_FOR_TARGET=gcc-ar NM_FOR_TARGET=gcc-nm RANLIB_FOR_TARGET=gcc-ranlib
# libitm needs sparc V9+ # libitm needs sparc V9+
ifeq ($(BR2_sparc_v8)$(BR2_sparc_leon3),y) ifeq ($(BR2_sparc_v8)$(BR2_sparc_leon3),y)
@@ -117,7 +118,7 @@ endif
# quadmath support requires wchar # quadmath support requires wchar
ifeq ($(BR2_USE_WCHAR)$(BR2_TOOLCHAIN_HAS_LIBQUADMATH),yy) ifeq ($(BR2_USE_WCHAR)$(BR2_TOOLCHAIN_HAS_LIBQUADMATH),yy)
HOST_GCC_COMMON_CONF_OPTS += --enable-libquadmath HOST_GCC_COMMON_CONF_OPTS += --enable-libquadmath --enable-libquadmath-support
else else
HOST_GCC_COMMON_CONF_OPTS += --disable-libquadmath --disable-libquadmath-support HOST_GCC_COMMON_CONF_OPTS += --disable-libquadmath --disable-libquadmath-support
endif endif