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gcc: update to support gcc 11.3.0 and 12.2.0 from offical tag 2022.11.3

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Signed-off-by: Andy Hu <andy.hu@starfivetech.com>
This commit is contained in:
Andy Hu
2023-03-09 00:07:15 +08:00
parent 650e638627
commit 389dc57182
12 changed files with 774 additions and 17 deletions
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package/gcc/11.3.0/0001-or1k-Add-mcmodel-option-to-handle-large-GOTs.patch
+200
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@@ -0,0 +1,200 @@
From 7a20b4574f06472086c786bd1b078ee962cdb02c Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Tue, 6 Apr 2021 05:47:17 +0900
Subject: [PATCH] or1k: Add mcmodel option to handle large GOTs
When building libgeos we get an error with:
linux-uclibc/9.3.0/crtbeginS.o: in function `__do_global_dtors_aux':
crtstuff.c:(.text+0x118): relocation truncated to fit: R_OR1K_GOT16 against symbol `__cxa_finalize' defined in .text section in
/home/shorne/work/openrisc/3eb9f9d0f6d8274b2d19753c006bd83f7d536e3c/output/host/or1k-buildroot-linux-uclibc/sysroot/lib/libc.so.
This is caused by GOT code having a limit of 64k. In OpenRISC this
looks to be the only relocation code pattern to be limited to 64k.
This patch allows specifying a new option -mcmodel=large which can be
used to generate 2 more instructions to construct 32-bit addresses for
up to 4G GOTs.
gcc/ChangeLog:
PR target/99783
* config/or1k/or1k-opts.h: New file.
* config/or1k/or1k.c (or1k_legitimize_address_1, print_reloc):
Support generating gotha relocations if -mcmodel=large is
specified.
* config/or1k/or1k.h (TARGET_CMODEL_SMALL, TARGET_CMODEL_LARGE):
New macros.
* config/or1k/or1k.opt (mcmodel=): New option.
* doc/invoke.texi (OpenRISC Options): Document mcmodel.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
gcc/config/or1k/or1k-opts.h | 30 ++++++++++++++++++++++++++++++
gcc/config/or1k/or1k.c | 11 +++++++++--
gcc/config/or1k/or1k.h | 7 +++++++
gcc/config/or1k/or1k.opt | 19 +++++++++++++++++++
gcc/doc/invoke.texi | 12 +++++++++++-
5 files changed, 76 insertions(+), 3 deletions(-)
create mode 100644 gcc/config/or1k/or1k-opts.h
diff --git a/gcc/config/or1k/or1k-opts.h b/gcc/config/or1k/or1k-opts.h
new file mode 100644
index 00000000000..f791b894fdd
--- /dev/null
+++ b/gcc/config/or1k/or1k-opts.h
@@ -0,0 +1,30 @@
+/* Definitions for option handling for OpenRISC.
+ Copyright (C) 2021 Free Software Foundation, Inc.
+ Contributed by Stafford Horne.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef GCC_OR1K_OPTS_H
+#define GCC_OR1K_OPTS_H
+
+/* The OpenRISC code generation models available. */
+enum or1k_cmodel_type {
+ CMODEL_SMALL,
+ CMODEL_LARGE
+};
+
+#endif /* GCC_OR1K_OPTS_H */
diff --git a/gcc/config/or1k/or1k.c b/gcc/config/or1k/or1k.c
index e772a7addea..27d3fa17995 100644
--- a/gcc/config/or1k/or1k.c
+++ b/gcc/config/or1k/or1k.c
@@ -750,7 +750,14 @@ or1k_legitimize_address_1 (rtx x, rtx scratch)
{
base = gen_sym_unspec (base, UNSPEC_GOT);
crtl->uses_pic_offset_table = 1;
- t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
+ if (TARGET_CMODEL_LARGE)
+ {
+ emit_insn (gen_rtx_SET (t1, gen_rtx_HIGH (Pmode, base)));
+ emit_insn (gen_add3_insn (t1, t1, pic_offset_table_rtx));
+ t2 = gen_rtx_LO_SUM (Pmode, t1, base);
+ }
+ else
+ t2 = gen_rtx_LO_SUM (Pmode, pic_offset_table_rtx, base);
t2 = gen_const_mem (Pmode, t2);
emit_insn (gen_rtx_SET (t1, t2));
base = t1;
@@ -1089,7 +1096,7 @@ print_reloc (FILE *stream, rtx x, HOST_WIDE_INT add, reloc_kind kind)
no special markup. */
static const char * const relocs[RKIND_MAX][RTYPE_MAX] = {
{ "lo", "got", "gotofflo", "tpofflo", "gottpofflo", "tlsgdlo" },
- { "ha", NULL, "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
+ { "ha", "gotha", "gotoffha", "tpoffha", "gottpoffha", "tlsgdhi" },
};
reloc_type type = RTYPE_DIRECT;
diff --git a/gcc/config/or1k/or1k.h b/gcc/config/or1k/or1k.h
index fe01ab81ead..669907e7e74 100644
--- a/gcc/config/or1k/or1k.h
+++ b/gcc/config/or1k/or1k.h
@@ -21,6 +21,8 @@
#ifndef GCC_OR1K_H
#define GCC_OR1K_H
+#include "config/or1k/or1k-opts.h"
+
/* Names to predefine in the preprocessor for this target machine. */
#define TARGET_CPU_CPP_BUILTINS() \
do \
@@ -37,6 +39,11 @@
} \
while (0)
+#define TARGET_CMODEL_SMALL \
+ (or1k_code_model == CMODEL_SMALL)
+#define TARGET_CMODEL_LARGE \
+ (or1k_code_model == CMODEL_LARGE)
+
/* Storage layout. */
#define DEFAULT_SIGNED_CHAR 1
diff --git a/gcc/config/or1k/or1k.opt b/gcc/config/or1k/or1k.opt
index 6bd0f3eee6d..cc23e3b8856 100644
--- a/gcc/config/or1k/or1k.opt
+++ b/gcc/config/or1k/or1k.opt
@@ -21,6 +21,9 @@
; See the GCC internals manual (options.texi) for a description of
; this file's format.
+HeaderInclude
+config/or1k/or1k-opts.h
+
mhard-div
Target RejectNegative InverseMask(SOFT_DIV)
Enable generation of hardware divide (l.div, l.divu) instructions. This is the
@@ -63,6 +66,22 @@ When -mhard-float is selected, enables generation of unordered floating point
compare and set flag (lf.sfun*) instructions. By default functions from libgcc
are used to perform unordered floating point compare and set flag operations.
+mcmodel=
+Target RejectNegative Joined Enum(or1k_cmodel_type) Var(or1k_code_model) Init(CMODEL_SMALL)
+Specify the code model used for accessing memory addresses. Specifying large
+enables generating binaries with large global offset tables. By default the
+value is small.
+
+Enum
+Name(or1k_cmodel_type) Type(enum or1k_cmodel_type)
+Known code model types (for use with the -mcmodel= option):
+
+EnumValue
+Enum(or1k_cmodel_type) String(small) Value(CMODEL_SMALL)
+
+EnumValue
+Enum(or1k_cmodel_type) String(large) Value(CMODEL_LARGE)
+
mcmov
Target RejectNegative Mask(CMOV)
Enable generation of conditional move (l.cmov) instructions. By default the
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 35508efb4ef..a1b7608a3aa 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1136,7 +1136,8 @@ Objective-C and Objective-C++ Dialects}.
@gccoptlist{-mboard=@var{name} -mnewlib -mhard-mul -mhard-div @gol
-msoft-mul -msoft-div @gol
-msoft-float -mhard-float -mdouble-float -munordered-float @gol
--mcmov -mror -mrori -msext -msfimm -mshftimm}
+-mcmov -mror -mrori -msext -msfimm -mshftimm @gol
+-mcmodel=@var{code-model}}
@emph{PDP-11 Options}
@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
@@ -26443,6 +26444,15 @@ Enable generation of shift with immediate (@code{l.srai}, @code{l.srli},
@code{l.slli}) instructions. By default extra instructions will be generated
to store the immediate to a register first.
+@item -mcmodel=small
+@opindex mcmodel=small
+Generate OpenRISC code for the small model: The GOT is limited to 64k. This is
+the default model.
+
+@item -mcmodel=large
+@opindex mcmodel=large
+Generate OpenRISC code for the large model: The GOT may grow up to 4G in size.
+
@end table
--
2.35.1
package/gcc/11.3.0/0002-or1k-Use-cmodel-large-when-building-crtstuff.patch
+60
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@@ -0,0 +1,60 @@
From c544a63928406b706b8493fd9b8ca2136b433cf0 Mon Sep 17 00:00:00 2001
From: Stafford Horne <shorne@gmail.com>
Date: Wed, 21 Apr 2021 05:33:15 +0900
Subject: [PATCH] or1k: Use cmodel=large when building crtstuff
When linking gcc runtime objects into large binaries the link may fail
with the below errors. This will happen even if we are building with
-mcmodel=large.
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `deregister_tm_clones':
crtstuff.c:(.text+0x3c): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_deregisterTMCloneTable'
/home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `register_tm_clones':
crtstuff.c:(.text+0xc0): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_registerTMCloneTable'
This patch builds the gcc crtstuff binaries always with the
-mcmodel=large option to ensure they can be linked into large binaries.
libgcc/ChangeLog:
PR target/99783
* config.host (or1k-*, tmake_file): Add or1k/t-crtstuff.
* config/or1k/t-crtstuff: New file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
libgcc/config.host | 4 ++--
libgcc/config/or1k/t-crtstuff | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
create mode 100644 libgcc/config/or1k/t-crtstuff
diff --git a/libgcc/config.host b/libgcc/config.host
index f2dc7e266f4..6f193c32fbd 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1132,12 +1132,12 @@ nios2-*-*)
extra_parts="$extra_parts crti.o crtn.o"
;;
or1k-*-linux*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
md_unwind_header=or1k/linux-unwind.h
;;
or1k-*-*)
- tmake_file="$tmake_file or1k/t-or1k"
+ tmake_file="$tmake_file or1k/t-or1k or1k/t-crtstuff"
tmake_file="$tmake_file t-softfp-sfdf t-softfp"
;;
pdp11-*-*)
diff --git a/libgcc/config/or1k/t-crtstuff b/libgcc/config/or1k/t-crtstuff
new file mode 100644
index 00000000000..dcae7f3498e
--- /dev/null
+++ b/libgcc/config/or1k/t-crtstuff
@@ -0,0 +1,2 @@
+# Compile crtbeginS.o and crtendS.o with -mcmodel=large
+CRTSTUFF_T_CFLAGS_S += -mcmodel=large
--
2.35.1
package/gcc/11.3.0/0003-gcc-define-_REENTRANT-for-OpenRISC-when-pthread-is-p.patch
+31
View File
@@ -0,0 +1,31 @@
From 8ef5787701f4d7cf46a27771d38ab54af2499e25 Mon Sep 17 00:00:00 2001
From: Bernd Kuhls <bernd.kuhls@t-online.de>
Date: Fri, 27 Mar 2020 21:23:53 +0100
Subject: [PATCH] gcc: define _REENTRANT for OpenRISC when -pthread is passed
The detection of pthread support fails on OpenRISC unless _REENTRANT
is defined. Added the CPP_SPEC definition to correct this.
Patch sent upstream: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94372
Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
---
gcc/config/or1k/linux.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/or1k/linux.h b/gcc/config/or1k/linux.h
index 196f3f3c8f0..0cbdc934af1 100644
--- a/gcc/config/or1k/linux.h
+++ b/gcc/config/or1k/linux.h
@@ -32,6 +32,8 @@
#undef MUSL_DYNAMIC_LINKER
#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-or1k.so.1"
+#define CPP_SPEC "%{pthread:-D_REENTRANT}"
+
#undef LINK_SPEC
#define LINK_SPEC "%{h*} \
%{static:-Bstatic} \
--
2.35.1
package/gcc/11.3.0/0004-disable-split-stack-for-non-thread-builds.patch
+26
View File
@@ -0,0 +1,26 @@
From 3b9d7d397fa6dc290eb05bffca80968efb6ec2e5 Mon Sep 17 00:00:00 2001
From: Waldemar Brodkorb <wbx@openadk.org>
Date: Mon, 25 Jul 2022 00:29:55 +0200
Subject: [PATCH] disable split-stack for non-thread builds
Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
[Romain: convert to git format]
Signed-off-by: Romain Naour <romain.naour@smile.fr>
---
libgcc/config/t-stack | 2 ++
1 file changed, 2 insertions(+)
diff --git a/libgcc/config/t-stack b/libgcc/config/t-stack
index cc0366b4cd8..f3f97e86d60 100644
--- a/libgcc/config/t-stack
+++ b/libgcc/config/t-stack
@@ -1,4 +1,6 @@
# Makefile fragment to provide generic support for -fsplit-stack.
# This should be used in config.host for any host which supports
# -fsplit-stack.
+ifeq ($(enable_threads),yes)
LIB2ADD_ST += $(srcdir)/generic-morestack.c $(srcdir)/generic-morestack-thread.c
+endif
--
2.34.3
package/gcc/11.3.0/0005-rs6000-Improve-.machine.patch
+120
View File
@@ -0,0 +1,120 @@
From ca2c3a7d3db7a699c358d3408f820396dd536fc8 Mon Sep 17 00:00:00 2001
From: Segher Boessenkool <segher@kernel.crashing.org>
Date: Tue, 1 Mar 2022 17:04:29 +0000
Subject: [PATCH] rs6000: Improve .machine
This adds more correct .machine for most older CPUs. It should be
conservative in the sense that everything we handled before we handle at
least as well now. This does not yet revamp the server CPU handling, it
is too risky at this point in time.
Tested on powerpc64-linux {-m32,-m64}. Also manually tested with all
-mcpu=, and the output of that passed through the GNU assembler.
2022-03-04 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.c (rs6000_machine_from_flags): Restructure a
bit. Handle most older CPUs.
(cherry picked from commit 77eccbf39ed55297802bb66dff5f62507a7239e3)
(cherry picked from commit fc7e603edc67c66a14f893f3b5a0a34e7d26f77c)
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
gcc/config/rs6000/rs6000.c | 81 +++++++++++++++++++++++++-------------
1 file changed, 54 insertions(+), 27 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 0421dc7adb3..0a55c979c36 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5742,33 +5742,60 @@ const char *rs6000_machine;
const char *
rs6000_machine_from_flags (void)
{
- /* For some CPUs, the machine cannot be determined by ISA flags. We have to
- check them first. */
- switch (rs6000_cpu)
- {
- case PROCESSOR_PPC8540:
- case PROCESSOR_PPC8548:
- return "e500";
-
- case PROCESSOR_PPCE300C2:
- case PROCESSOR_PPCE300C3:
- return "e300";
-
- case PROCESSOR_PPCE500MC:
- return "e500mc";
-
- case PROCESSOR_PPCE500MC64:
- return "e500mc64";
-
- case PROCESSOR_PPCE5500:
- return "e5500";
-
- case PROCESSOR_PPCE6500:
- return "e6500";
-
- default:
- break;
- }
+ /* e300 and e500 */
+ if (rs6000_cpu == PROCESSOR_PPCE300C2 || rs6000_cpu == PROCESSOR_PPCE300C3)
+ return "e300";
+ if (rs6000_cpu == PROCESSOR_PPC8540 || rs6000_cpu == PROCESSOR_PPC8548)
+ return "e500";
+ if (rs6000_cpu == PROCESSOR_PPCE500MC)
+ return "e500mc";
+ if (rs6000_cpu == PROCESSOR_PPCE500MC64)
+ return "e500mc64";
+ if (rs6000_cpu == PROCESSOR_PPCE5500)
+ return "e5500";
+ if (rs6000_cpu == PROCESSOR_PPCE6500)
+ return "e6500";
+
+ /* 400 series */
+ if (rs6000_cpu == PROCESSOR_PPC403)
+ return "\"403\"";
+ if (rs6000_cpu == PROCESSOR_PPC405)
+ return "\"405\"";
+ if (rs6000_cpu == PROCESSOR_PPC440)
+ return "\"440\"";
+ if (rs6000_cpu == PROCESSOR_PPC476)
+ return "\"476\"";
+
+ /* A2 */
+ if (rs6000_cpu == PROCESSOR_PPCA2)
+ return "a2";
+
+ /* Cell BE */
+ if (rs6000_cpu == PROCESSOR_CELL)
+ return "cell";
+
+ /* Titan */
+ if (rs6000_cpu == PROCESSOR_TITAN)
+ return "titan";
+
+ /* 500 series and 800 series */
+ if (rs6000_cpu == PROCESSOR_MPCCORE)
+ return "\"821\"";
+
+ /* 600 series and 700 series, "classic" */
+ if (rs6000_cpu == PROCESSOR_PPC601 || rs6000_cpu == PROCESSOR_PPC603
+ || rs6000_cpu == PROCESSOR_PPC604 || rs6000_cpu == PROCESSOR_PPC604e
+ || rs6000_cpu == PROCESSOR_PPC750 || rs6000_cpu == PROCESSOR_POWERPC)
+ return "ppc";
+
+ /* Classic with AltiVec, "G4" */
+ if (rs6000_cpu == PROCESSOR_PPC7400 || rs6000_cpu == PROCESSOR_PPC7450)
+ return "\"7450\"";
+
+ /* The older 64-bit CPUs */
+ if (rs6000_cpu == PROCESSOR_PPC620 || rs6000_cpu == PROCESSOR_PPC630
+ || rs6000_cpu == PROCESSOR_RS64A || rs6000_cpu == PROCESSOR_POWERPC64)
+ return "ppc64";
HOST_WIDE_INT flags = rs6000_isa_flags;
--
2.34.3
package/gcc/11.3.0/0006-rs6000-Do-not-use-rs6000_cpu-for-.machine-ppc-and-pp.patch
+68
View File
@@ -0,0 +1,68 @@
From 6de33ed642f119f1e2543095dd56e4a94f97c27f Mon Sep 17 00:00:00 2001
From: Segher Boessenkool <segher@kernel.crashing.org>
Date: Fri, 11 Mar 2022 21:15:18 +0000
Subject: [PATCH] rs6000: Do not use rs6000_cpu for .machine ppc and ppc64
(PR104829)
Fixes: 77eccbf39ed5
rs6000.h has
#define PROCESSOR_POWERPC PROCESSOR_PPC604
#define PROCESSOR_POWERPC64 PROCESSOR_RS64A
which means that if you use things like -mcpu=powerpc -mvsx it will no
longer work after my latest .machine patch. This causes GCC build errors
in some cases, not a good idea (even if the errors are actually
pre-existing: using -mvsx with a machine that does not have VSX cannot
work properly).
2022-03-11 Segher Boessenkool <segher@kernel.crashing.org>
PR target/104829
* config/rs6000/rs6000.c (rs6000_machine_from_flags): Don't output
"ppc" and "ppc64" based on rs6000_cpu.
(cherry picked from commit 80fcc4b6afee72443bef551064826b3b4b6785e6)
(cherry picked from commit d87e0e297b1cba73a0c055d2a3e9267d288f435a)
Signed-off-by: Romain Naour <romain.naour@gmail.com>
---
gcc/config/rs6000/rs6000.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 0a55c979c36..7e5cdd34840 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5782,20 +5782,28 @@ rs6000_machine_from_flags (void)
if (rs6000_cpu == PROCESSOR_MPCCORE)
return "\"821\"";
+#if 0
+ /* This (and ppc64 below) are disabled here (for now at least) because
+ PROCESSOR_POWERPC, PROCESSOR_POWERPC64, and PROCESSOR_COMMON
+ are #define'd as some of these. Untangling that is a job for later. */
+
/* 600 series and 700 series, "classic" */
if (rs6000_cpu == PROCESSOR_PPC601 || rs6000_cpu == PROCESSOR_PPC603
|| rs6000_cpu == PROCESSOR_PPC604 || rs6000_cpu == PROCESSOR_PPC604e
- || rs6000_cpu == PROCESSOR_PPC750 || rs6000_cpu == PROCESSOR_POWERPC)
+ || rs6000_cpu == PROCESSOR_PPC750)
return "ppc";
+#endif
/* Classic with AltiVec, "G4" */
if (rs6000_cpu == PROCESSOR_PPC7400 || rs6000_cpu == PROCESSOR_PPC7450)
return "\"7450\"";
+#if 0
/* The older 64-bit CPUs */
if (rs6000_cpu == PROCESSOR_PPC620 || rs6000_cpu == PROCESSOR_PPC630
- || rs6000_cpu == PROCESSOR_RS64A || rs6000_cpu == PROCESSOR_POWERPC64)
+ || rs6000_cpu == PROCESSOR_RS64A)
return "ppc64";
+#endif
HOST_WIDE_INT flags = rs6000_isa_flags;
--
2.34.3
package/gcc/11.3.0/0007-fixinc-don-t-fix-machine-names-in-__has_include-.-PR.patch
+124
View File
@@ -0,0 +1,124 @@
From de3f4ee9a5bd2adcb5ff2e1690db2567fda1473c Mon Sep 17 00:00:00 2001
From: Xi Ruoyao <xry111@mengyan1223.wang>
Date: Mon, 28 Jun 2021 13:54:58 +0800
Subject: [PATCH] fixinc: don't "fix" machine names in __has_include(...)
[PR91085]
fixincludes/
PR other/91085
* fixfixes.c (check_has_inc): New static function.
(machine_name_fix): Don't replace header names in
__has_include(...).
* inclhack.def (machine_name): Adjust test.
* tests/base/testing.h: Update.
Upstream: 6bf383c37e6131a8e247e8a0997d55d65c830b6d
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
---
fixincludes/fixfixes.c | 45 ++++++++++++++++++++++++++++++--
fixincludes/inclhack.def | 3 ++-
fixincludes/tests/base/testing.h | 2 +-
3 files changed, 46 insertions(+), 4 deletions(-)
diff --git a/fixincludes/fixfixes.c b/fixincludes/fixfixes.c
index 5b23a8b640d..404b420f302 100644
--- a/fixincludes/fixfixes.c
+++ b/fixincludes/fixfixes.c
@@ -477,6 +477,39 @@ FIX_PROC_HEAD( char_macro_def_fix )
fputs (text, stdout);
}
+/* Check if the pattern at pos is actually in a "__has_include(...)"
+ directive. Return the pointer to the ')' of this
+ "__has_include(...)" if it is, NULL otherwise. */
+static const char *
+check_has_inc (const char *begin, const char *pos, const char *end)
+{
+ static const char has_inc[] = "__has_include";
+ const size_t has_inc_len = sizeof (has_inc) - 1;
+ const char *p;
+
+ for (p = memmem (begin, pos - begin, has_inc, has_inc_len);
+ p != NULL;
+ p = memmem (p, pos - p, has_inc, has_inc_len))
+ {
+ p += has_inc_len;
+ while (p < end && ISSPACE (*p))
+ p++;
+
+ /* "__has_include" may appear as "defined(__has_include)",
+ search for the next appearance then. */
+ if (*p != '(')
+ continue;
+
+ /* To avoid too much complexity, just hope there is never a
+ ')' in a header name. */
+ p = memchr (p, ')', end - p);
+ if (p == NULL || p > pos)
+ return p;
+ }
+
+ return NULL;
+}
+
/* Fix for machine name #ifdefs that are not in the namespace reserved
by the C standard. They won't be defined if compiling with -ansi,
and the headers will break. We go to some trouble to only change
@@ -524,7 +557,7 @@ FIX_PROC_HEAD( machine_name_fix )
/* If the 'name_pat' matches in between base and limit, we have
a bogon. It is not worth the hassle of excluding comments
because comments on #if/#ifdef lines are rare, and strings on
- such lines are illegal.
+ such lines are only legal in a "__has_include" directive.
REG_NOTBOL means 'base' is not at the beginning of a line, which
shouldn't matter since the name_re has no ^ anchor, but let's
@@ -544,8 +577,16 @@ FIX_PROC_HEAD( machine_name_fix )
break;
p = base + match[0].rm_so;
- base += match[0].rm_eo;
+ /* Check if the match is in __has_include(...) (PR 91085). */
+ q = check_has_inc (base, p, limit);
+ if (q)
+ {
+ base = q + 1;
+ goto again;
+ }
+
+ base += match[0].rm_eo;
/* One more test: if on the same line we have the same string
with the appropriate underscores, then leave it alone.
We want exactly two leading and trailing underscores. */
diff --git a/fixincludes/inclhack.def b/fixincludes/inclhack.def
index 066bef99162..b7ad6982e96 100644
--- a/fixincludes/inclhack.def
+++ b/fixincludes/inclhack.def
@@ -3154,7 +3154,8 @@ fix = {
c_fix = machine_name;
test_text = "/* MACH_DIFF: */\n"
- "#if defined( i386 ) || defined( sparc ) || defined( vax )"
+ "#if defined( i386 ) || defined( sparc ) || defined( vax ) || "
+ "defined( linux ) || __has_include ( <linux.h> )"
"\n/* no uniform test, so be careful :-) */";
};
diff --git a/fixincludes/tests/base/testing.h b/fixincludes/tests/base/testing.h
index cf95321fb86..8b3accaf04e 100644
--- a/fixincludes/tests/base/testing.h
+++ b/fixincludes/tests/base/testing.h
@@ -64,7 +64,7 @@ BSD43__IOWR('T', 1) /* Some are multi-line */
#if defined( MACHINE_NAME_CHECK )
/* MACH_DIFF: */
-#if defined( i386 ) || defined( sparc ) || defined( vax )
+#if defined( i386 ) || defined( sparc ) || defined( vax ) || defined( linux ) || __has_include ( <linux.h> )
/* no uniform test, so be careful :-) */
#endif /* MACHINE_NAME_CHECK */
--
2.37.3